SBOS589D December   2013  – June 2015 TLV1701 , TLV1702 , TLV1704

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TLV1701
    5. 7.5 Thermal Information: TLV1702 and TLV1704
    6. 7.6 Electrical Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Comparator Inputs
    4. 8.4 Device Functional Modes
      1. 8.4.1 Setting Reference Voltage
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

TLV1701
DBV (SOT-23-5), DCK (SC70-5), DRL (SOT553-5) Packages
Top View
TLV1701 TLV1702 TLV1704 ai_pkg_dck_bos589.gif
TLV1702
DGK (VSSOP-8) Package
Top View
TLV1701 TLV1702 TLV1704 ai_pkg_dgk_bos589.gif
TLV1702
RUG (X2QFN-8) Package
Top View
TLV1701 TLV1702 TLV1704 ai_pkg_rug_bos589.gif
TLV1704
PW (TSSOP-14) Package
Top View
TLV1701 TLV1702 TLV1704 ai_pkg_pw_bos589.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
TLV1701
DBV, DCK, DRL
TLV1702
DGK, RUG
TLV1704
PW
IN+ 1 I Noninverting input
1IN+ 3 5 I Noninverting input, channel 1
2IN+ 5 7 I Noninverting input, channel 2
3IN+ 9 I Noninverting input, channel 3
4IN+ 11 I Noninverting input, channel 4
IN– 3 I Inverting input
1IN– 2 4 I Inverting input, channel 1
2IN– 6 6 I Inverting input, channel 2
3IN– 8 I Inverting input, channel 3
4IN– 10 I Inverting input, channel 4
OUT 4 O Output
1OUT 1 2 O Output, channel 1
2OUT 7 1 O Output, channel 2
3OUT 14 O Output, channel 3
4OUT 13 O Output, channel 4
V+ 5 8 3 Positive (highest) power supply
V– 2 4 12 Negative (lowest) power supply