JAJSME2B December   2022  – September 2024 TLV1851 , TLV1852 , TLV1854 , TLV1861 , TLV1862 , TLV1864

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
    1.     Pin Configuration: TLV1831 and TLV1841
    2.     Pin Configurations: TLV1852 and TLV1862
    3.     Pin Configurations: TLV1854 and TLV1864
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Inputs
        1. 6.4.1.1 Operating Common-Mode Ranges
        2. 6.4.1.2 Fail-Safe Inputs
        3. 6.4.1.3 Unused Inputs
      2. 6.4.2 Internal Hysteresis
      3. 6.4.3 Outputs
        1. 6.4.3.1 TLV185x Push-Pull Output
        2. 6.4.3.2 TLV186x Open-Drain Output
      4. 6.4.4 ESD Protection
        1. 6.4.4.1 Inputs
        2. 6.4.4.2 Outputs
      5. 6.4.5 Power-On Reset (POR)
      6. 6.4.6 Reverse Battery Protection
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
      2. 7.1.2 Hysteresis
        1. 7.1.2.1 Inverting Comparator With Hysteresis
        2. 7.1.2.2 Non-Inverting Comparator With Hysteresis
        3. 7.1.2.3 Inverting and Non-Inverting Hysteresis using Open-Drain Output
    2. 7.2 Typical Applications
      1. 7.2.1 Window Comparator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Undervoltage Detection
      3. 7.2.3 Reverse Battery and Overvoltage Protection Scheme
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 デバイスおよびドキュメントのサポート
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.4.4.1 Inputs

The fail-safe inputs incorporates internal ESD protection circuits on all pins. The fail-safe inputs have ESD protection from each pin to (V-) which allows these pins to exceed the supply voltage (V+) up to 40V. If input voltages are to exceed 40V, an external clamp would be required. Likewise, negative voltages on the inputs are ESD clamped to (V-) and should be limited to less than -0.1V.

If the inputs are to be connected to a low impedance source, such as a power supply or buffered reference line, TI recommends adding a current-limiting resistor in series with the input to limit any transient currents should the clamps conduct. The current should be limited to 10mA or less. This series resistance can be part of any resistive input dividers or networks.