JAJSME2A december   2022  – august 2023 TLV1851 , TLV1861

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1.     Pin Configuration: TLV1851 and TLV1861
    2.     Pin Configurations: TLV1852 and TLV1862
    3.     Pin Configurations: TLV1854 and TLV1864
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs
        1. 7.4.1.1 Operating Common-Mode Ranges
        2. 7.4.1.2 Fail-Safe Inputs
        3. 7.4.1.3 Unused Inputs
      2. 7.4.2 Internal Hysteresis
      3. 7.4.3 Outputs
        1. 7.4.3.1 TLV185x Push-Pull Output
        2. 7.4.3.2 TLV186x Open-Drain Output
      4. 7.4.4 ESD Protection
        1. 7.4.4.1 Inputs
        2. 7.4.4.2 Outputs
      5. 7.4.5 Power-On Reset (POR)
      6. 7.4.6 Reverse Battery Protection
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Comparator Definitions
        1. 8.1.1.1 Operation
        2. 8.1.1.2 Propagation Delay
        3. 8.1.1.3 Overdrive Voltage
      2. 8.1.2 Hysteresis
        1. 8.1.2.1 Inverting Comparator With Hysteresis
        2. 8.1.2.2 Non-Inverting Comparator With Hysteresis
        3. 8.1.2.3 Inverting and Non-Inverting Hysteresis using Open-Drain Output
    2. 8.2 Typical Applications
      1. 8.2.1 Window Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Undervoltage Detection
      3. 8.2.3 Reverse Battery and Overvoltage Protection Scheme
    3. 8.3 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10デバイスおよびドキュメントのサポート
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3 Thermal Information

THERMAL METRIC(1) TLV185x/6x UNIT
DBV
(SOT-23)		 D
(SOIC)		 DGK
(VSSOP)		 PW
(TSSOP)		 D
(SOIC)
5 Pins 8 Pins 8 Pins 14 Pins 14 Pins
RqJA Junction-to-ambient thermal resistance 168.1 121.6 163.1 °C/W
RqJC(top) Junction-to-case (top) thermal resistance 68.1 64.6 55.5 °C/W
RqJB Junction-to-board thermal resistance 37.4 65.1 84.7 °C/W
yJT Junction-to-top characterization parameter 11.4 18.1 5.7 °C/W
yJB Junction-to-board characterization parameter 37.1 64.3 83.1 °C/W
RqJC(bot) Junction-to-case (bottom) thermal resistance °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.