JAJSN68A october   2006  – may 2023 TLV3011-EP , TLV3012-EP

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings - TLV3011-EP
    2. 6.2  Absolute Maximum Ratings - TLV3012-EP
    3. 6.3  ESD Ratings
    4. 6.4  Thermal Resistance Characteristics
    5. 6.5  Recommended Operating Conditions - TLV3011-EP
    6. 6.6  Recommended Operating Conditions - TLV3012-EP
    7. 6.7  Electrical Characteristics - TLV3011-EP
    8. 6.8  Electrical Characteristics - TLV3012-EP
    9. 6.9  Switching Characteristics - TLV3012-EP
    10. 6.10 Typical Characteristics - TLV3011-EP
    11. 6.11 Typical Characteristics - TLV3012-EP
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open Drain Output (TLV3011-EP)
      2. 7.4.2 Push Pull Output (TLV3012-EP)
      3. 7.4.3 Voltage Reference
      4. 7.4.4 Fail-Safe Input (TLV3012-EP Only)
      5. 7.4.5 Power-On Reset (POR) (TLV3012-EP Only)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Hysteresis
    2. 8.2 Typical Application
      1. 8.2.1 Under Voltage Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Performance Plots
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
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サーマルパッド・メカニカル・データ
発注情報

7.4.5 Power-On Reset (POR) (TLV3012-EP Only)

This section does NOT apply to the open-drain output TLV3011-EP.

The TLV3012-EP has an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry will be activated for up to 1.9ms after the minimum supply voltage threshold is crossed, or immediately when the supply voltage drops below minimum supply. When the supply voltage is equal to or greater than the minimum supply voltage, and after the delay period, the comparator output reflects the state of the differential input (VID). This delay is long enough to allow the reference output to stabilize with up to a 10nF capacitive load.

During the POR period (ton), the outputs will be low (sinking)

GUID-20200930-CA0I-6CZK-PN9L-0JWV5FWGP6NC-low.gifFigure 7-1 Power-On Reset Example Timing Diagram for TLV3012-EP