JAJSN68A october   2006  – may 2023 TLV3011-EP , TLV3012-EP

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings - TLV3011-EP
    2. 6.2  Absolute Maximum Ratings - TLV3012-EP
    3. 6.3  ESD Ratings
    4. 6.4  Thermal Resistance Characteristics
    5. 6.5  Recommended Operating Conditions - TLV3011-EP
    6. 6.6  Recommended Operating Conditions - TLV3012-EP
    7. 6.7  Electrical Characteristics - TLV3011-EP
    8. 6.8  Electrical Characteristics - TLV3012-EP
    9. 6.9  Switching Characteristics - TLV3012-EP
    10. 6.10 Typical Characteristics - TLV3011-EP
    11. 6.11 Typical Characteristics - TLV3012-EP
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open Drain Output (TLV3011-EP)
      2. 7.4.2 Push Pull Output (TLV3012-EP)
      3. 7.4.3 Voltage Reference
      4. 7.4.4 Fail-Safe Input (TLV3012-EP Only)
      5. 7.4.5 Power-On Reset (POR) (TLV3012-EP Only)
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Hysteresis
    2. 8.2 Typical Application
      1. 8.2.1 Under Voltage Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Performance Plots
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DBV|6
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics - TLV3012-EP

For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 1.8V and 5.5V,  VCM = V/2 at TA = 25°C (Unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VCM = (V–) –6 ±0.3 6 mV
VOS Input offset voltage VCM = (V–)
TA = –55°C to +125°C
–9 9 mV
dVIO/dT Input offset voltage drift VCM = (V–)
TA = –55°C to +125°C
±12 µV/°C
PSRR power supply rejection ratio VCM = (V–)
VS = 1.65 V to 5.5 V
TA = –55°C to +125°C
100 1000 µV/V
VHYS Input hysteresis voltage TA = –55°C to +125°C 2 6 8 mV
INPUT BIAS CURRENT
IB Input bias current VCM =  V/2  –10(1) ±4.5 10(1) pA
IOS Input offset current VCM =  V/2  –10(1) ±1 10(1) pA
INPUT COMMON MODE RANGE
VCM-Range Common-mode voltage range VS = 1.8 V to 5.5 V
TA = –55°C to +125°C
(V–) – 0.2 (V+) + 0.2 V
CMRR Common mode rejection ratio VCM = (V–) + 1.5V to (V+) + 0.2V
TA = –55°C to +125°C
60 74 dB
CMRR Common mode rejection ratio VCM = (V–) - 0.2V to (V+) + 0.2V
TA = –55°C to +125°C
54 62 dB
RCM Input Common Mode Resistance 1013
CIC Input Common Mode Capacitance 2 pF
INPUT IMPEDANCE
RDM Input Differential Mode Resistance 1013
CID Input Differential Mode  Capacitance 4 pF
OUTPUT
VOL Voltage swing from (V–) VS = 5 V
ISINK = 5 mA
TA = –55°C to +125°C
160 200 mV
VOH Voltage swing from (V+) VS = 5 V
ISOURCE = 5 mA
TA = –55°C to +125°C
90 200 mV
VOLTAGE REFERENCE
VOUT Reference Voltage 1.223 1.242 1.260 V
Accuracy ±0.25% ±1.5%
dVOUT/dT Temperature Drift TA = –55°C to +125°C 40 100 ppm/℃
dVOUT/dILOAD Load Regulation, Sourcing 0 mA < ISOURCE ≤ 0.5 mA 0.36 1(1) mV/mA
Load Regulation, Sinking 0 mA < ISINK ≤ 0.5 mA 6.6
mV/mA

ILOAD Output Current 0.5 mA
dVOUT/dVS Line Regulation 1.65 V ≤ VS ≤ 5.5 V 10 100(1) µV/V
Vnoise Noise f = 0.1 Hz to 10 Hz 0.2 mVPP
POWER SUPPLY
IQ Quiescent current per comparator  Output is logic high 2.4 3.1 µA
IQ Quiescent current per comparator Output is logic high
TA = –55°C to +125°C
3.6 µA
Ensured by characterization