JAJSNH8B December   2022  – September 2023 TLV2365 , TLV365

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail-to-Rail Input
      2. 8.3.2 Input and ESD Protection
      3. 8.3.3 Driving Capacitive Loads
      4. 8.3.4 Active Filter
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Overdrive Recovery Performance
      2. 9.1.2 Achieving an Output Level of Zero Volts
    2. 9.2 Typical Applications
      1. 9.2.1 Second-Order Low-Pass Filter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 ADC Driver and Reference Buffer
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 10.1.1.3 DIP アダプタ評価基板
        4. 10.1.1.4 DIYAMP-EVM
        5. 10.1.1.5 TI のリファレンス・デザイン
        6. 10.1.1.6 フィルタ設計ツール
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TA = 25°C, VS = 5 V, RL = 10 kΩ, and gain = 1 V/V (unless otherwise noted)

GUID-20221206-SS0I-CGM2-L2FG-35SJPHPXSZJP-low.svg
 
Figure 7-1 Open-Loop Gain and Phase vs Frequency
GUID-20221206-SS0I-ZFRM-2SLD-PXQWMPHWZWQ5-low.svg
70000 units, μ = 9.3 μV, σ = 320 μV.
Figure 7-3 Offset Voltage Production Distribution
GUID-20221208-SS0I-XFSX-HX2Z-TTTTXRW7GHJX-low.svg
40 units
Figure 7-5 Input Bias Current vs Temperature
GUID-20221208-SS0I-RGKG-1ND2-CGKHHX3T4VLR-low.svg
VS = ±2.75 V
Figure 7-7 Output Voltage vs Output Current
GUID-20221206-SS0I-WTCC-KHMF-FL1NKL0RVTSL-low.svg
 
Figure 7-9 Frequency Response vs Output Voltage
GUID-20221206-SS0I-HBJH-HRTF-HCP3G6N3V1MB-low.svg
 
Figure 7-11 Small-Signal Response vs Capacitive Load
GUID-20221208-SS0I-QXZB-MCSG-0W9QWCGJPVXP-low.svg
 
Figure 7-13 0.1-Hz to 10-Hz Input Voltage Noise
GUID-20221206-SS0I-ZL2V-JQVB-LWC244SRKKLR-low.svg
 
Figure 7-15 Input Current Noise Spectral Density
GUID-20221206-SS0I-MKBM-RDBV-5QPV4MS4DVM1-low.svg
RL = 600 Ω
Figure 7-17 Small-Signal Step Response
GUID-20221206-SS0I-GNR9-RFD4-K3B71CWNSKWB-low.svg
VS = ±2.75 V
Figure 7-19 Overdrive Recovery
GUID-20221206-SS0I-KQRM-ZDPN-TPPWPGG7FQRK-low.svg
VS = ±2.75 V
Figure 7-21 Open Loop Voltage Gain vs Output Voltage
GUID-20221206-SS0I-ZSSB-QXRD-L0W4N0WWBQH2-low.svg
 
Figure 7-2 Power-Supply and Common-Mode Rejection Ratio
GUID-20221212-SS0I-FH5D-4SLT-RMX1QKTFKVWF-low.svg
40 units, μ = 0.06 μV/°C, σ = 0.4 μV/°C
Figure 7-4 Offset Voltage Drift Distribution
GUID-20221208-SS0I-SWVN-LCGV-Z1RKF0SSKCHV-low.svg
40 units
Figure 7-6 Input Bias Current vs Common-Mode Voltage
GUID-20221206-SS0I-VM3X-QNDW-GNRW42BTZNPK-low.svg
20 units
Figure 7-8 Short-Circuit Current vs Temperature
GUID-20221206-SS0I-JDFN-ZNGR-PJWJT7W2CXMM-low.svg
 
Figure 7-10 Small-Signal Frequency Response vs Gain
GUID-20221206-SS0I-M634-MHQT-WFHXTBN7MBT0-low.svg
RL = 600 Ω
Figure 7-12 Total Harmonic Distortion + Noise vs Frequency
GUID-20221206-SS0I-ZFKS-WP1Z-MQKQRZPHMRH3-low.svg
 
Figure 7-14 Input Voltage Noise Spectral Density
GUID-20221206-SS0I-BGHH-HKP8-WPFGTHJM30JX-low.svg
For gain ≠ 1 V/V, RF = 1 kΩ. For gain = 1 V/V, RF = 0 Ω.
Figure 7-16 Overshoot vs Capacitive Load
GUID-20221206-SS0I-MRLF-0LQQ-SD1FFNTVQNHQ-low.svg
RL = 600 Ω
Figure 7-18 Large-Signal Step Response
GUID-20221206-SS0I-GCXD-GVR7-XT6FVNRPZCHS-low.svg
 
Figure 7-20 Open-Loop Output Impedance
GUID-20221206-SS0I-9LW8-BQZW-VNFPSN86FQF3-low.svg
 
Figure 7-22 Electromagnetic Interference Rejection Ratio Referred to Noninverting Input (EMIRR+) vs Frequency