JAJSNH8C
December 2022 – August 2024
TLV2365
,
TLV365
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Rail-to-Rail Input
7.3.2
Input and ESD Protection
7.3.3
Driving Capacitive Loads
7.3.4
Active Filter
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.1.1
Overdrive Recovery Performance
8.1.2
Achieving an Output Level of Zero Volts
8.2
Typical Applications
8.2.1
Second-Order Low-Pass Filter
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.2.2
ADC Driver and Reference Buffer
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.1.1.1
PSpice® for TI
9.1.1.2
TINA-TI™シミュレーション ソフトウェア (無償ダウンロード)
9.1.1.3
DIP アダプタ評価基板
9.1.1.4
DIYAMP-EVM
9.1.1.5
TI のリファレンス・デザイン
9.1.1.6
Analog Filter Designer
9.2
Documentation Support
9.2.1
Related Documentation
9.3
ドキュメントの更新通知を受け取る方法
9.4
サポート・リソース
9.5
Trademarks
9.6
静電気放電に関する注意事項
9.7
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DBV|5
MPDS018T
サーマルパッド・メカニカル・データ
発注情報
jajsnh8c_oa
jajsnh8c_pm
8.4.2
Layout Example
Figure 8-8
Layout Recommendation for
TLV2365
SOIC Package