JAJSNH8B
December 2022 – September 2023
TLV2365
,
TLV365
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Rail-to-Rail Input
8.3.2
Input and ESD Protection
8.3.3
Driving Capacitive Loads
8.3.4
Active Filter
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Overdrive Recovery Performance
9.1.2
Achieving an Output Level of Zero Volts
9.2
Typical Applications
9.2.1
Second-Order Low-Pass Filter
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.2
ADC Driver and Reference Buffer
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Development Support
10.1.1.1
PSpice® for TI
10.1.1.2
TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
10.1.1.3
DIP アダプタ評価基板
10.1.1.4
DIYAMP-EVM
10.1.1.5
TI のリファレンス・デザイン
10.1.1.6
フィルタ設計ツール
10.2
Documentation Support
10.2.1
Related Documentation
10.3
ドキュメントの更新通知を受け取る方法
10.4
サポート・リソース
10.5
Trademarks
10.6
静電気放電に関する注意事項
10.7
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DBV|5
MPDS018S
サーマルパッド・メカニカル・データ
発注情報
jajsnh8b_oa
jajsnh8b_pm
5
Device Comparison Table
DEVICE
INPUT TYPE
OFFSET DRIFT TYPICAL
(µV/C)
MINIMUM GAIN STABLE (V/V)
I
Q
/CHANNEL TYPICAL
(mA)
GAIN BANDWIDTH
(MHz)
SLEW RATE
(V/µs)
VOLTAGE NOISE
(nV/√Hz)
TLVx365
CMOS
0.4
1
4.6
50
27
4.5
OPAx607
CMOS
0.3
6
0.9
50
24
3.8
OPAx365
CMOS
1
1
4.6
50
25
4.5