DATA SHEET
TLV600x 低電力、レール・ツー・レール入出力、1MHzオペアンプ、低コスト・システム用
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1 特長
2 アプリケーション
- 産業用およびコンシューマ電子機器
- 携帯機器
- 携行用血糖値測定器
- 煙感知器
- 白物家電
- 外付けバッテリ
CMRRおよびPSRRと温度との関係
3 概要
TLV600xファミリは1、2、4チャネルのオペアンプで、汎用アプリケーション向けに設計されています。レール・ツー・レール入出力(RRIO)、低い静止電流(標準値75μA)、広い帯域幅(1MHz)、低いノイズ(1kHzにおいて28nV/√Hz)という特長から、コンシューマ向け電子機器、煙感知器、白物家電など、コストと性能の適切なバランスが必要な各種のアプリケーションに魅力的な選択肢です。入力バイアス電流が低い(標準値±1.0pA)ため、TLV600xファミリはソース・インピーダンスがメガオーム単位のアプリケーションに使用できます。
TLV600xデバイスは堅牢に設計されており、150pFまでの容量性負荷に対するユニティ・ゲイン安定性、RF/EMI除去フィルタの搭載、オーバードライブ状態で位相反転が発生しない、高い静電放電(ESD)保護(4kV HBM)といった特長があるため、回路設計が容易です。
これらのデバイスは、1.8V (±0.9V)～5.5V (±2.75V)の電圧で動作するよう最適化され、拡張温度範囲の-40℃ ～+125℃での動作が規定されています。
1チャネルのTLV6001デバイスは、SC70-5とSOT23-5の両方のパッケージで供給されます。2チャネルのTLV6002はSOIC-8およびVSSOP-8パッケージで、4チャネルのTLV6004はTSSOP-14パッケージで供給されます。
製品情報(1)
| 型番 | パッケージ | 本体サイズ(公称) |
|---|---|---|
| TLV6001 | SC70 (5) | 2.00mm×1.25mm |
| SOT-23 (5) | 2.90mm×1.60mm | |
| TLV6002 | SOIC (8) | 4.90mm×3.91mm |
| VSSOP (8) | 3.00mm×3.00mm | |
| TLV6004 | TSSOP (14) | 5.00mm×4.40mm |
- 提供されているすべてのパッケージについては、データシートの末尾にある注文情報を参照してください。
4 改訂履歴
Changes from C Revision (December 2016) to D Revision
- Changed inverting input pin to noninverting input pin in Pin Functions: TLV6001 table Go
- Changed inverting input pin to noninverting input pin in Pin Functions: TLV6001R table Go
- Changed inverting input pin to noninverting input pin in Pin Functions: TLV6001U table Go
- Changed 「関連リンク」の表で「サンプルと購入」を「ご注文はこちら」にGo
Changes from B Revision (October 2016) to C Revision
- Changed all pin outs in Pin Configuration and Functions section to reflect correct pin names and orderGo
Changes from A Revision (July 2016) to B Revision
- Added TLV6001R pinout drawing to Pin Configurations and Functions section Go
- Added TLV6001U pinout drawing to Pin Configurations and Functions section Go
Changes from * Revision (June 2016) to A Revision
5 Pin Configuration and Functions
TLV6001: DCK Package
5-Pin SC70
Top View
TLV6001: DBV Package
5-Pin SOT-23
Top View
Pin Functions: TLV6001
Pin Functions: TLV6001R
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| –IN | 4 | I | Inverting input |
| +IN | 3 | I | Noninverting input |
| OUT | 1 | O | Output |
| V– | 5 | — | Negative (lowest) power supply |
| V+ | 2 | — | Positive (highest) power supply |
Pin Functions: TLV6001U
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| –IN | 3 | I | Inverting input |
| +IN | 1 | I | Noninverting input |
| OUT | 4 | O | Output |
| V– | 2 | — | Negative (lowest) power supply |
| V+ | 5 | — | Positive (highest) power supply |
TLV6002: D, DGK Packages
8-Pin SOIC, 8-Pin VSSOP
TLV6002 Top View
Pin Functions: TLV6002
| PIN | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | D (SOIC) | DGK (VSSOP) | ||
| –IN A | 2 | 2 | I | Inverting input, channel A |
| –IN B | 6 | 6 | I | Inverting input, channel B |
| +IN A | 3 | 3 | I | Noninverting input, channel A |
| +IN B | 5 | 5 | I | Noninverting input, channel B |
| OUT A | 1 | 1 | O | Output, channel A |
| OUT B | 7 | 7 | O | Output, channel B |
| V– | 4 | 4 | — | Negative (lowest) power supply |
| V+ | 8 | 8 | — | Positive (highest) power supply |
TLV6004: PW Package
14-Pin TSSOP
Top View
Pin Functions: TLV6004
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| –IN A | 2 | I | Inverting input, channel A |
| –IN B | 6 | I | Inverting input, channel B |
| –IN C | 9 | I | Inverting input, channel C |
| –IN D | 13 | I | Inverting input, channel D |
| +IN A | 3 | I | Noninverting input, channel A |
| +IN B | 5 | I | Noninverting input, channel B |
| +IN C | 10 | I | Noninverting input, channel C |
| +IN D | 12 | I | Noninverting input, channel D |
| OUT A | 1 | O | Output, channel A |
| OUT B | 7 | O | Output, channel B |
| OUT C | 8 | O | Output, channel C |
| OUT D | 14 | O | Output, channel D |
| V– | 11 | — | Negative (lowest) power supply |
| V+ | 4 | — | Positive (highest) power supply |
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Voltage | Supply voltage | 7 | V | |
| Signal input pins, voltage(2) | (V–) – 0.5 | (V+) + 0.5 | V | |
| Current | Signal input pins, current(2) | –10 | 10 | mA |
| Output short-circuit(3) | Continuous | mA | ||
| Temperature | Operating, TA | –40 | 150 | °C |
| Junction, TJ | 150 | °C | ||
| Storage, Tstg | –65 | 150 | °C | |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that may swing more than 0.5 V beyond the supply rails must be current limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VS | Supply voltage | 1.8 | 5.5 | V |
| TA | Specified temperature range | –40 | 125 | °C |
6.4 Thermal Information: TLV6001
| THERMAL METRIC(1) | TLV6001 | UNIT | ||
|---|---|---|---|---|
| DBV (SOT-23) | DCK (SC70) | |||
| 5 PINS | 5 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 228.5 | 281.4 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 99.1 | 91.6 | °C/W |
| RθJB | Junction-to-board thermal resistance | 54.6 | 59.6 | °C/W |
| ψJT | Junction-to-top characterization parameter | 7.7 | 1.5 | °C/W |
| ψJB | Junction-to-board characterization parameter | 53.8 | 58.8 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.5 Thermal Information: TLV6002
| THERMAL METRIC(1) | TLV6002 | UNIT | ||
|---|---|---|---|---|
| D (SOIC) | DGK (VSSOP) | |||
| 8 PINS | 8 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 138.4 | 191.2 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 89.5 | 61.9 | °C/W |
| RθJB | Junction-to-board thermal resistance | 78.6 | 111.9 | °C/W |
| ψJT | Junction-to-top characterization parameter | 29.9 | 5.1 | °C/W |
| ψJB | Junction-to-board characterization parameter | 78.1 | 110.2 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.6 Thermal Information: TLV6004
| THERMAL METRIC(1) | TLV6004 | UNIT | |
|---|---|---|---|
| PW (TSSOP) | |||
| 14 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 121.0 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 49.4 | °C/W |
| RθJB | Junction-to-board thermal resistance | 62.8 | °C/W |
| ψJT | Junction-to-top characterization parameter | 5.9 | °C/W |
| ψJB | Junction-to-board characterization parameter | 62.2 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.7 Electrical Characteristics: VS= 1.8 V to 5 V (±0.9 V to ±2.75 V)(1)
at TA = 25°C, RL = 10 kΩ connected to VS / 2, and VCM = VOUT = VS / 2, unless otherwise noted.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| OFFSET VOLTAGE | |||||||
| VOS | Input offset voltage | 0.75 | 4.5 | mV | |||
| dVOS/dT | VOS vs temperature | TA = –40°C to 125°C | 2 | μV/°C | |||
| PSRR | Power-supply rejection ratio | 86 | dB | ||||
| INPUT BIAS CURRENT | |||||||
| IB | Input bias current | TA = 25°C | ±1.0 | pA | |||
| IOS | Input offset current | ±1.0 | pA | ||||
| INPUT IMPEDANCE | |||||||
| ZID | Differential | 100 || 1 | MΩ || pF | ||||
| ZIC | Common-mode | 1 || 5 | 1013Ω || pF | ||||
| INPUT VOLTAGE RANGE | |||||||
| VCM | Common-mode voltage range | No phase reversal, rail-to-rail input | (V–) – 0.2 | (V+) + 0.2 | V | ||
| CMRR | Common-mode rejection ratio | VCM = –0.2 V to 5.7 V | 60 | 76 | dB | ||
| OPEN-LOOP GAIN | |||||||
| AOL | Open-loop voltage gain | 0.3 V < VO < (V+) – 0.3 V, RL = 2 kΩ | 90 | 110 | |||
| Phase margin | VS = 5.0 V, G = +1 | 65 | degrees | ||||
| OUTPUT | |||||||
| VO | Voltage output swing from supply rails | RL = 100 kΩ | 5 | mV | |||
| RL = 2 kΩ | 75 | 100 | mV | ||||
| ISC | Short-circuit current | ±15 | mA | ||||
| RO | Open-loop output impedance | 2300 | Ω | ||||
| FREQUENCY RESPONSE | |||||||
| GBW | Gain-bandwidth product | 1 | MHz | ||||
| SR | Slew rate | 0.5 | V/µs | ||||
| tS | Settling time | To 0.1%, VS = 5.0 V, 2-V step , G = +1 | 5 | μs | |||
| NOISE | |||||||
| Input voltage noise (peak-to-peak) | f = 0.1 Hz to 10 Hz | 6 | μVPP | ||||
| en | Input voltage noise density | f = 1 kHz | 28 | nV/√Hz | |||
| in | Input current noise density | f = 1 kHz | 5 | fA/√Hz | |||
| POWER SUPPLY | |||||||
| VS | Specified voltage range | 1.8 (±0.9) | 5.5 (±2.75) | V | |||
| IQ | Quiescent current per amplifier | IO = 0 mA, VS = 5.0 V | 75 | 100 | µA | ||
| Power-on time | VS = 0 V to 5 V, to 90% IQ level | 10 | µs | ||||
(1) Parameters with minimum or maximum specification limits are 100% production tested at 25ºC, unless otherwise noted. Over-temperature limits are based on characterization and statistical analysis.
6.8 Typical Characteristics: Table of Graphs
Table 2. Table of Graphs
| TITLE | FIGURE |
|---|---|
| Open-Loop Gain and Phase vs Frequency | Figure 1 |
| Quiescent Current vs Supply Voltage | Figure 2 |
| Offset Voltage Production Distribution | Figure 3 |
| Offset Voltage vs Common-Mode Voltage (Maximum Supply) | Figure 4 |
| CMRR and PSRR vs Frequency (RTI) | Figure 5 |
| 0.1-Hz to 10-Hz Input Voltage Noise (5.5 V) | Figure 6 |
| Input Voltage Noise Spectral Density vs Frequency (1.8 V, 5.5 V) | Figure 7 |
| Input Bias and Offset Current vs Temperature | Figure 8 |
| Open-Loop Output Impedance vs Frequency | Figure 9 |
| Maximum Output Voltage vs Frequency and Supply Voltage | Figure 10 |
| Output Voltage Swing vs Output Current (over Temperature) | Figure 11 |
| Closed-Loop Gain vs Frequency, G = 1, –1, 10 (1.8 V) | Figure 12 |
| Small-Signal Step Response, Noninverting (1.8 V) | Figure 13 |
| Small-Signal Step Response, Noninverting ( 5.5 V) | Figure 14 |
| Large-Signal Step Response, Noninverting (1.8 V) | Figure 15 |
| Large-Signal Step Response, Noninverting ( 5.5 V) | Figure 16 |
| No Phase Reversal | Figure 17 |
| EMIRR IN+ vs Frequency | Figure 18 |
6.9 Typical Characteristics
at TA = 25°C, VS = 5 V, RL = 10 kΩ connected to VS / 2, and VCM = VOUT = VS / 2, unless otherwise noted.
(Referred-to-Input)
(Minimum Supply)
(Minimum Supply)
(Maximum Supply)
(Maximum Supply)
