JAJSI98B June   2016  – March 2021 TLV627432

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DCS-Control™
      2. 8.3.2 Power Save Mode Operation
      3. 8.3.3 Output Voltage Selection
      4. 8.3.4 Output Voltage Discharge of the Buck Converter
      5. 8.3.5 Undervoltage Lockout UVLO
      6. 8.3.6 Short circuit protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Shutdown
      2. 8.4.2 Device Start-up and Softstart
      3. 8.4.3 Automatic Transition Into No Ripple 100% Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-6C5D2AED-7B5C-41C1-BA25-A136A49F3FC2-low.gif Figure 6-1 8-Pin DSBGA YFP Package (Top View)
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO
VIN A2 PWR VIN power supply pin. Connect the input capacitor close to this pin for best noise and voltage spike suppression. A ceramic capacitor of 4.7 µF is required.
SW A1 OUT The switch pin is connected to the internal MOSFET switches. Connect the inductor to this terminal.
GND B2 PWR GND supply pin. Connect this pin close to the GND terminal of the input and output capacitor.
VOS C2 IN Feedback pin for the internal feedback divider network and regulation loop. Discharges VOUT when the converter is disabled. Connect this pin directly to the output capacitor with a short trace.
VSEL3 D2 IN Output voltage selection pins. See Table 6-2 for VOUT selection. These pin must be terminated. The pins can be dynamically changed during operation.
VSEL2 D1 IN
VSEL1 C1 IN
EN B1 IN High level enables the devices, low level turns the device off. The pin must be terminated.
Table 6-2 Output Voltage Setting
Output Voltage Setting VOUT [V] VSEL Setting
TLV627432 VSEL3 VSEL2 VSEL1
1.2 0 0 0
1.5 0 0 1
1.8 0 1 0
2.1 0 1 1
2.5 1 0 0
2.8 1 0 1
3.0 1 1 0
3.3 1 1 1