JAJSKM6
november 2020
TLV6700-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
7.8
Timing Diagrams
7.9
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Inputs (INA+, INB–)
8.3.2
Outputs (OUTA, OUTB)
8.3.3
Window Comparator
8.3.4
Immunity to Input Terminal Voltage Transients
8.4
Device Functional Modes
8.4.1
Normal Operation (VDD > UVLO)
8.4.2
Undervoltage Lockout (V(POR) < VDD < UVLO)
8.4.3
Power-On Reset (VDD < V(POR))
9
Application and Implementation
9.1
Application Information
9.1.1
VPULLUP to a Voltage Other Than VDD
9.1.2
Monitoring VDD
9.1.3
Monitoring a Voltage Other Than VDD
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Resistor Divider Selection
9.2.2.2
Pullup Resistor Selection
9.2.2.3
Input Supply Capacitor
9.2.2.4
Input Capacitors
9.2.3
Application Curves
9.3
Do's and Don'ts
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DDC|6
MPDS124I
DSE|6
MPDS287A
サーマルパッド・メカニカル・データ
発注情報
jajskm6_oa
jajskm6_pm
7.9
Typical Characteristics
at T
J
= 25°C and V
DD
= 5 V (unless otherwise noted)
Figure 7-2
Supply Current (I
DD
) vs Supply Voltage (V
DD
)
Figure 7-4
Hysteresis (V
hys
) vs Temperature
Figure 7-6
Propagation Delay vs Temperature (Low-to-High Transition at the Inputs)
Figure 7-8
Supply Current (I
DD
) vs Output Sink Current
Figure 7-10
Output Voltage Low (V
OL
) vs Output Sink Current (0°C)
Figure 7-12
Output Voltage Low (V
OL
) vs Output Sink Current (85°C)
Figure 7-3
Rising Input Threshold Voltage (V
IT+
) vs Temperature
Figure 7-5
Propagation Delay vs Temperature (High-to-Low Transition at the Inputs)
INA+ = negative spike below V
IT–
INB– = positive spike above V
IT+
Figure 7-7
Minimum Pulse Duration vs Threshold Overdrive Voltage
Figure 7-9
Output Voltage Low (V
OL
) vs Output Sink Current (–40°C)
Figure 7-11
Output Voltage Low (V
OL
) vs Output Sink Current (25°C)
Figure 7-13
Output Voltage Low (V
OL
) vs Output Sink Current (125°C)