JAJSDD8C July   2017  – June 2019 TLV743P

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
      2.      ドロップアウト電圧と出力電流との関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Shutdown and Output Enable
      3. 7.3.3 Internal Foldback Current Limit
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Selection
      2. 8.1.2 Dropout Voltage
      3. 8.1.3 Power Dissipation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 評価基板
      2. 11.1.2 デバイスの項目表記
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBV|5
  • DQN|4
サーマルパッド・メカニカル・データ
発注情報

8.1.3 Power Dissipation

The ability to remove heat from the die is different for each package type and presents different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to ambient air. Performance data for JEDEC high-K boards are shown in Thermal Information. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves heat sink effectiveness.

Power dissipation (PD) depends on input voltage and load conditions. PD is equal to the product of the output current and voltage drop across the output pass element, as shown in Equation 2.

Equation 2. TLV743P sbvs310_equation2.gif

Figure 31 shows the maximum ambient temperature versus the power dissipation of the TLV743P device in the DQN and DBV packages. This figure assumes the device is soldered on JEDEC standard high-K layout with no airflow over the board. Actual board thermal impedances vary widely. If the application requires high power dissipation, it is helpful to have a thorough understanding of the board temperature and thermal impedances to make certain that the TLV743P device does not operate continuously above a junction temperature of 125°C.

TLV743P D028_sbvs310.gif
TLV743P, high-K layout
Figure 31. Maximum Ambient Temperature vs Device Power Dissipation