JAJSFF0D February   2019  – August 2021 TLV9301 , TLV9302 , TLV9304

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Protection Circuitry
      2. 7.3.2 EMI Rejection
      3. 7.3.3 Phase Reversal Protection
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 Common-Mode Voltage Range
      7. 7.3.7 Electrical Overstress
      8. 7.3.8 Overload Recovery
      9. 7.3.9 Typical Specifications and Distributions
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High Voltage Precision Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

Figure 5-1 TLV9301 DBV Package
5-Pin SOT-23
Top View
Figure 5-2 TLV9301 DCK Package
5-Pin SC70
Top View
Table 5-1 Pin Functions: TLV9301
PIN I/O DESCRIPTION
NAME DBV DCK
+IN 3 1 I Noninverting input
–IN 4 3 I Inverting input
OUT 1 4 O Output
V+ 5 5 — Positive (highest) power supply
V– 2 2 — Negative (lowest) power supply
Figure 5-3 TLV9302 D, DDF, DGK, and PW Package
8-Pin SOIC, TSOT, TSSOP, and VSSOP
Top View
Table 5-2 Pin Functions: TLV9302
PIN I/O DESCRIPTION
NAME NO.
+IN A 3 I Noninverting input, channel A
+IN B 5 I Noninverting input, channel B
–IN A 2 I Inverting input, channel A
–IN B 6 I Inverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V+ 8 — Positive (highest) power supply
V– 4 — Negative (lowest) power supply
Figure 5-4 TLV9304 D and PW Package
14-Pin SOIC and TSSOP
Top View
Table 5-3 Pin Functions: TLV9304
PIN I/O DESCRIPTION
NAME NO.
+IN A 3 I Noninverting input, channel A
+IN B 5 I Noninverting input, channel B
+IN C 10 I Noninverting input, channel C
+IN D 12 I Noninverting input, channel D
–IN A 2 I Inverting input, channel A
–IN B 6 I Inverting input, channel B
–IN C 9 I Inverting input, channel C
–IN D 13 I Inverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V+ 4 — Positive (highest) power supply
V– 11 — Negative (lowest) power supply