JAJSOZ7A August 2022 – April 2024 TMDS1204
PRODUCTION DATA
Design Parameter | Value |
---|---|
VCC | 3.3V (±5%) |
VIO (1.2V, 1.8V, or 3.3V LVCMOS levels) | 3.3V |
Maximum HDMI 2.1 FRL Datarate (6, 8, 10, or 12Gbps) | 12Gbps |
Pin-strap or I2C mode (if I2C, then MODE = "F"). | Pin-strap |
Pin Strap Mode.(MODE = "0", "R" or "1"). | Mode = "1" (Adaptive EQ) |
DDC Snoop Feature. (Y/N). Required when in pin strap. Optional in I2C mode. | Yes |
SWAP function (Y / N). In pin strap mode controlled by SDA/CFG1 pin. | No. SDA/CFG1 pin = L. |
HPD_IN to HPD_OUT Level Shifter Support (Y / N) | No, then HPD_OUT can be left floating. |
Pre-Channel Length (Table 8-6 lists the length restrictions) | Length = 1 inches; Width = 4 mil. (≅ 1dB at 6GHz insertion loss) |
Post-Channel Length (Table 8-6 lists the length restrictions) | Length = 6 inches; Width = 4 mil (≅ 6dB at 6GHz insertion loss) |
Limited or linear redriver mode? | Linear redriver (LINEAR_EN pin = "F") recommended in sink application |
TX is DC or AC-coupled to HDMI receptacle? | AC-coupled. AC_EN pin = High. |
RX EQ (16 possible values. Value chosen based on pre-channel length). | EQ1 pin: "0" ADDR/EQ0 pin: "1" (2.7dB) |
CTLE Map (Map A, Map B or Map C). In pre-strap controlled by CTLEMAP_SEL pin. | For Sink application recommend Map B or C. |
TX pre-emphasis. In pre-strap mode controlled by TXPRE pin. TX pre-emphasis control not supported in linear redriver mode. | Float TXPRE pin. |
TX Swing. In pre-strap mode controlled by TXSWG pin. | Default TX swing level. Float TXSWG pin. |
Fan-out Buffer support (Y / N) | Typically only used with a FPGA. If feature needed in pin-strap mode, then MODE must be set to "R". |
Symbol | Parameter | Condition | Min | Typ | Max | Units |
---|---|---|---|---|---|---|
RESD | External series resistor between ESD component and TMDS1204 | 0 | 2.5 | Ω | ||
LAB(1)(3) | PCB trace length from receptacle to TMDS1204 | 0.75 | 2 | inches | ||
LINTRA-AB | Intra-pair skew from receptacle to TMDS1204 | 2 | mil | |||
LCD(1) | PCB trace length from TMDS1204 to sink | 1 | 6 | inches | ||
LINTRA-CD | Intra-pair skew from TMDS1204 to sink | 2 | mil | |||
LCAP-TX | PCB trace length from TMDS1204 to external CAC-TX capacitor | 0.3 | inches | |||
LESD | PCB trace length from ESD component to receptacle | 0.5 | inches | |||
LR_ESD | PCB trace length from RESD to ESD component | 0.25 | inches | |||
LINTER-PAIR(3) | Inter-pair skew between all four channels (D0, D1, D2, and CLK) | 0.10 | inches | |||
ILPCB | PCB trace insertion loss | 0.1 | 0.17 | dB / inch /GHz | ||
ZPCB_AB | Differential impedance of LAB | 90 | 110 | Ω | ||
ZPCB_CD | Differential impedance of LCD | 90 | 110 | Ω | ||
VIAAB | Number of vias between receptacle and TMDS1204 | 1 | VIA | |||
VIACD | Number of vias between sink and TMDS1204 | 2 | VIA | |||
XTALK | Differential crosstalk between adjacent differential pairs on PCB. | ≦ 3GHz | −24 | dB |