JAJSOZ7A
August 2022 – April 2024
TMDS1204
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD and Latch-Up Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Switching Characteristics
5.8
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Functional Block Diagram
7.2
Feature Description
7.2.1
4-Level Inputs
7.2.2
I/O Voltage Level Selection
7.2.3
HPD_OUT
7.2.4
Lane Control
7.2.5
Swap
7.2.6
Linear and Limited Redriver
7.2.7
Main Link Inputs
7.2.8
Receiver Equalizer
7.2.9
CTLE Bypass
7.2.10
Adaptive Equalization in HDMI 2.1 FRL
7.2.10.1
HDMI 2.1 TX Compliance Testing with AEQ Enabled
7.2.11
HDMI 2.1 Link Training Compatible Rx EQ
7.2.12
Input Signal Detect
7.2.12.1
SIGDET_OUT Indicator
7.2.13
Main Link Outputs
7.2.13.1
Transmitter Bias
7.2.13.2
Transmitter Impedance Control
7.2.13.3
TX Slew Rate Control
7.2.13.4
TX Pre-Emphasis and De-Emphasis Control
7.2.13.5
TX Swing Control
7.2.13.6
Fan-out Buffer
7.2.14
HDMI DDC Capacitance
7.2.15
DisplayPort
7.3
Device Functional Modes
7.3.1
MODE Control
7.3.1.1
I2C Mode (MODE = "F")
7.3.1.2
Pin Strap Modes
7.3.1.2.1
Pin-Strap: HDMI 1.4 and HDMI 2.0 Functional Description
7.3.1.2.2
Pin-Strap HDMI 2.1 Function (MODE = "0"): Fixed Rx EQ)
7.3.1.2.3
Pin-Strap HDMI 2.1 Function (Mode = "1"): Flexible Rx EQ
7.3.1.2.4
Pin-Strap HDMI 2.1 Function (Mode = "R"): Flexible Rx EQ and Fan-Out Buffer
7.3.2
DDC Snoop Feature
7.3.2.1
HDMI Type
7.3.2.2
HDMI 2.1 FRL Snoop
7.3.3
Low Power States
7.4
Programming
7.4.1
Pseudocode Examples
7.4.1.1
HDMI 2.1 Source Example with DDC Snoop Disabled and DDC Buffer Disabled
7.4.1.2
Sink Example
7.4.2
TMDS1204 I2C Address Options
7.4.3
I2C Target Behavior
7.5
Register Maps
7.5.1
TMDS1204 Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Source-Side Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Pre-Channel (LAB)
8.2.2.2
Post-Channel (LCD)
8.2.2.3
Common Mode Choke
8.2.2.4
ESD Protection
8.2.3
Application Curves
8.3
Typical Sink-Side Application
8.3.1
Design Requirements
8.3.2
Detailed Design Procedures
8.4
Power Supply Recommendations
8.4.1
Supply Decoupling
8.5
Layout
8.5.1
Layout Guidelines
8.5.2
Layout Example
9
デバイスおよびドキュメントのサポート
9.1
ドキュメントのサポート
9.1.1
関連資料
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
商標
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RNQ|40
MPQF457A
サーマルパッド・メカニカル・データ
発注情報
jajsoz7a_oa
jajsoz7a_pm
7.2.13
Main Link Outputs