SBOS685C April 2014 – July 2015 TMP007
PRODUCTION DATA.
The TMP007 is an integrated digital thermopile temperature sensor in a wafer chip-scale package (WCSP) that detects the temperature of a remote object by its infrared (IR) emission. It is optimal for thermal management and thermal protection applications where remote noncontact temperature sensing is desired. The TMP007 is two-wire and SMBus interface compatible, and is specified over the temperature range of –40°C to 125°C. The TMP007 contains registers for holding configuration and calibration information, temperature limits, local temperature, TDIE, measurement results, and the thermopile voltage measurement result. The local temperature and the thermopile voltage measurements are used by the math engine to calculate the object temperature, which is then stored in the respective register. In addition, the TMP007 has an internal EPROM memory that can be used to store the factory default values and custom values for coefficients and calibration parameters. The values in EPROM can be transferred to the registers either individually or as a complete set.
The SDA (and SCL, if driven by an open-drain output) interface pin requires a pull-up resistor (10 kΩ, typical) as part of the communication bus. The ALERT pin is an open-drain output that must also use a pull-up resistor, or be left floating if unused. If desired, ALERT may be shared with other devices for a wired-OR implementation.
The TMP007 senses the IR radiation that is emitted by all objects. The spectrum of the radiation depends only on the temperature and is given by Planck’s law, as shown in Equation 1:
where
The intensity of radiation from the object is determined by the emisivity (ε), a material-dependent property that scales the spectral response so that 0 < ε < 1. For an ideal black body, the radiation is at a maximum for a given temperature and ε = 1. The temperature is measured on the Kelvin scale where 0 K is absolute zero, or –273.15°C. Room temperature (25°C) is approximately 298.13 K. The emission spectra for objects at or near room temperature are shown in Figure 17. For these temperatures, the majority of the radiation emitted is in the wavelength range of 3 µm to 20 µm.
The TMP007 is optimized to sense IR radiation emitted by objects from approximately 250 K (–23°C) to 400 K (127°C), with maximum sensitivity from approximately 4 µm to 16 µm. The relative spectral response of the TMP007 is shown in Figure 18.
The TMP007 senses all radiation within a defined field of view (FOV). The FOV (or full-angle of θ) is defined as 2Φ. The TMP007 contains no optical elements, and thus senses all radiation within the hemisphere to the front of the device. Figure 2 shows the angular dependence of the sensor response and the relative power for a circular object that subtends a half angle of phi (Φ). Figure 19 defines the angle Φ in terms of object diameter and distance. Figure 19 assumes that the object is well approximated as a plane that is perpendicular to the sensor axis.
In this case, the maximum contribution is from the portion of the object directly in front of the TMP007 (Φ = 0), with the sensitivity per solid angle, dR/dΦ decreases as Φ increases. Approximately 50% of the energy sensed by the TMP007 is within a FOV (θ) = 90°.
This discussion is for illustrative purposes only; in practice the angular response (dR/dΦ) of the TMP007 to the object is affected by the object orientation, the number of objects, and the precise placement relative to the TMP007. Figure 20 shows the thermopile sensor dimensions.
The TMP007 senses radiation by absorbing the radiation on a hot junction. The thermopile then generates a voltage proportional to the temperature difference between the hot junction, Thot, and the cold junction, Tcold.
The cold junction is thermally grounded to the die, and is effectively TDIE, the die temperature. In thermal equilibrium, the hot junction is determined by the object temperature, TOBJ. The energy emitted by the object, EOBJ, minus the energy radiated by the die, EDIE, determines the temperature of the hot junction. The output voltage, VOUT, is therefore determined by the relationship shown in Equation 2:
where
Note that the sensor voltage is related to both the object temperature and the die temperature. A fundamental characteristic of all thermopiles is that they measure temperature differentials, not absolute temperatures. The TMP007 contains a highly-accurate, internal temperature sensor to measure TDIE. Knowing TDIE and VSENSOR enables the TMP007 to estimate TOBJ. For each 250-ms conversion cycle, the TMP007 measures a value for VSENSOR and for TDIE, calculates TOBJ, and then places the values in the respective registers.
Bits CR2 to CR0 determine the number of local and sensor analog-to-digital converter (ADC) results to average before the object temperature is calculated.
After power-on reset (POR), the TMP007 starts in four conversions per second (mode 010). In general, for a mode with N conversions, the local temperature, TDIE, result is updated at the end of the Nth ADC conversion with the value shown in Equation 3:
Similarly, the sensor voltage result is updated at the end of the Nth sensor ADC conversion with the value shown in Equation 4:
These results are then used in the object temperature calculation by the math engine, which updates the object temperature result register. The total conversion time and averages per conversion can be optimized to select the best combination of update rate versus noise for an application. Additionally, low-power conversion mode is available. In CR settings 101, 110, and 111, the device inserts a standby time before the beginning of the next conversion or conversions.
The method and requirements for estimating TOBJ are described in the next section.
The TMP007 generates a sensor voltage, VSensor, in register 00h that is related to the energy radiated by the object. For an ideal situation, the Stefan-Boltzman law relates the energy radiated by an object to its temperature by the relationship shown in Equation 5:
A similar relationship holds for the sensing element itself that radiates heat at a rate determined by TDIE. The net energy absorbed by the sensor is then given by the energy absorbed from the object minus the energy radiated by the sensor, as shown in Equation 6:
In an ideal situation, the sensor voltage relates to object temperature as shown in Equation 7:
where
The coefficients affect object temperature measurement as described in Table 1.
COEFFICIENT | PURPOSE | CALIBRATION | COMMENT |
---|---|---|---|
S0 | FOV and emissivity of object | Application and object dependent | Default values based on black body with ε = 0.95, and 110° FOV |
A1, A2 | Device properties | Factory set | Default values based on typical sensor characteristics |
C2 | Device properties | Factory set | Default values based on typical sensor characteristics |
B0, B1, B2 | Corrects for energy sources | Environment dependent | Calibrate in end-application environment |
The TMP007 default coefficients are calibrated with a black body of emissivity, ε = 0.95, and an FOV (θ) = 110°. Use these coefficients for applications where the object emissivity and geometry satisfy these conditions. For applications with different object emissivity or geometry, calibrate the TMP007 to accurately reflect the object temperature and system geometry. Accuracy is affected by device-to-device or object-to-object variation. For the most demanding applications, calibrate each device individually.
As an overview the calibration procedure includes:
The best temperature precision is available if every device is calibrated individually. Alternatively, if all the units in the application use the same coefficients, then calibrate a statistically significant number of devices, and load averaged coefficient values in nonvolatile memory.
Recalibration may be required under any or all of the following conditions:
For further information and methods for calibration, refer to SBOU142 — TMP007 Calibration Guide.
The TMP007 provides 16 bits of data in binary twos complement format. The positive full-scale input produces an output code of 7FFFh and the negative full-scale input produces an output code of 8000h. The output clips at these codes for signals that exceed full-scale. Table 2 summarizes the ideal output codes for different input signals. Figure 22 illustrates code transitions versus input voltage. Full-scale is a 5.12-mV signal. The LSB size is 156.25 nV.
SENSOR SIGNAL | VOLTAGE | OUTPUT CODE |
---|---|---|
FS (215 – 1) / 215 | 5.12 mV | 7FFFh |
FS / 215 | 156.25 nV | 0001h |
0 | 0 V | 0000h |
–FS / 215 | –156.25 nV | FFFFh |
–FS | –5.12 mV | 8000h |
The temperature register data format of the TMP007 is reported in a binary twos complement signed integer format, as Table 3 shows, with 1 LSB = (1 / 32)°C = 0.03125°C.
TEMPERATURE (°C) | DIGITAL OUTPUT (BINARY) | SHIFTED HEX |
---|---|---|
150 | 0100 1011 0000 0000 | 12C0 |
125 | 0011 1110 1000 0000 | 0FA0 |
100 | 0011 0010 0000 0000 | 0C80 |
80 | 0010 1000 0000 0000 | 0A00 |
75 | 0010 0101 1000 0000 | 0960 |
50 | 0001 1001 0000 0000 | 0640 |
25 | 0000 1100 1000 0000 | 0320 |
0.03125 | 0000 0000 0000 0100 | 0001 |
0 | 0000 0000 0000 0000 | 0000 |
–0.03125 | 1111 1111 1111 1100 | FFFF |
–0.0625 | 1111 1111 1111 1000 | FFFE |
–25 | 1111 0011 0111 0000 | FCDC |
–40 | 1110 1011 1111 1100 | FAFF |
–55 | 1110 0100 0111 1100 | F91F |
To convert the integer temperature result of the TMP007 to degrees Celsius, right-shift the result by two bits. Then perform a divide-by-32 of TDIE and TOBJ, the 14-bit signed integers contained in the corresponding registers. The sign of the temperature is the same as the sign of the integer read from the TMP007. In twos complement notation, the MSB is the sign bit. If the MSB is 1, the integer is negative and the absolute value can be obtained by inverting all bits and adding 1. An alternate method of calculating the absolute value of negative integers is abs(i) = i xor FFFFh + 1.
The TMP007 operates only as a slave device on the serial bus. Connections to the bus are made using the SCL Input and open-drain I/O SDA line. The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP007 supports the transmission protocol for both fast and fastplus (1 kHz to 1 MHz) and high-speed (1 MHz to 2.5 MHz) mode. All data bytes are transmitted MSB first. At higher speeds, thermal dissipation affects device operation, including accuracy.
The device that initiates a transfer is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the start and stop conditions.
To address a specific device, a start condition is initiated, indicated by pulling the data-line (SDA) from a high-to-low logic level while SCL is high. All slaves on the bus shift in the slave address byte, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the slave being addressed responds to the master by generating an Acknowledge and pulling SDA low.
Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During data transfer SDA must remain stable while SCL is high, as any change in SDA while SCL is high will be interpreted as a control signal.
Once all data has been transferred, the master generates a stop condition, indicated by pulling SDA from low to high while SCL is high.
To communicate with the TMP007, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or write operation. The TMP007 features two address pins allowing up to eight devices to be connected on a single bus. Pin logic levels and the corresponding address values are described in Table 4.
ADR1 | ADR0 | SMBus ADDRESSES |
---|---|---|
0 | 0 | 1000000 |
0 | 1 | 1000001 |
0 | SDA | 1000010 |
0 | SCL | 1000011 |
1 | 0 | 1000100 |
1 | 1 | 1000101 |
1 | SDA | 1000110 |
1 | SCL | 1000111 |
Accessing a particular register on the TMP007 is accomplished by writing the appropriate value to the pointer register. The value for the pointer register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP007 requires a value for the pointer register (see Figure 24).
When reading from the TMP007, the last value stored in the pointer register by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, write a new value to the pointer register. This action is accomplished by issuing a slave address byte with the R/W bit low, followed by the pointer register byte. No additional data are required. The master then generates a start condition and sends the slave address byte with the R/W bit high to initiate the read command. See Figure 25 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to continually send the pointer register byte because the TMP007 remembers the pointer register value until it is changed by the next write operation.
Note that register bytes are sent most significant byte first, followed by the least significant byte.
The TMP007 operates as a slave receiver or slave transmitter.
The first byte transmitted by the master is the slave address, with the R/W bit low. The TMP007 then acknowledges reception of a valid address. The next byte transmitted by the master is the pointer register. The TMP007 then acknowledges reception of the pointer register byte. The next two bytes are written to the register addressed by the pointer register. The TMP007 acknowledges reception of both data bytes. The master terminates data transfer by generating a start or stop condition.
The first byte is transmitted by the master and is the slave address, with the R/W bit high. The TMP007 acknowledges reception of a valid slave address. The next two bytes transmitted by the TMP007 are the value in the register indicated by the pointer register.
The master acknowledges reception of both data bytes. The master terminates the data transfer by generating a not-acknowledge bit on reception of any data byte, or generating a start or stop condition.
The TMP007 supports the SMBus alert function. When the TMP007 is operating in interrupt mode (TM = 1), the ALERT pin of the TMP007 can be connected as an SMBus alert signal. When a master senses that an alert condition is present on the ALERT line, the master sends an SMBus alert command (00011001) on the bus. If the ALERT pin of the TMP007 is active, the devices acknowledge the SMBus alert command and respond by returning its slave address on the SDA line. The eighth bit (LSB) of the slave address byte indicates if the cause of the alert condition is caused by the temperature exceeding THIGH or falling below TLOW. This bit is high if the temperature is greater than THIGH. This bit is low if the temperature is less than TLOW. See Figure 26 for details of this sequence.
If multiple devices on the bus respond to the SMBus alert command, arbitration during the slave address portion of the SMBus alert command determines which device clears the alert status. If the TMP007 wins the arbitration, its ALERT pin becomes inactive at the completion of the SMBus alert command. If the TMP007 loses the arbitration, the TMP007 ALERT pin remains active.
The TMP007 responds to a two-wire general call address (0000000) if the eighth bit is 0. The device acknowledges the general call address and respond to commands in the second byte. If the second byte is 00000110, the TMP007 internal registers are reset to power-up values.
In order for the two-wire bus to operate at frequencies above 400 kHz, the master device must issue an SMBus Hs-mode master code (00001xxx) as the first byte after a start condition to switch the bus to high-speed operation. The TMP007 does not acknowledge this byte, but switches its input filters on SDA and SCL, and its output filters on SDA to operate in Hs-mode, allowing transfers at up to 2.5 MHz. After the Hs-mode master code has been issued, the master transmits a two-wire slave address to initiate a data transfer operation. The bus continues to operate in Hs-mode until a stop condition occurs on the bus. Upon receiving the stop condition, the TMP007 switches the input and output filters back to fast-mode operation.
The TMP007 resets the serial interface if SCL is held low for 30 ms (typ) between a start and stop condition. The TMP007 releases the bus if SCL is pulled low and waits for a start condition. To avoid activating the timeout function, maintain a communication speed of at least 1 kHz for SCL operating frequency.
The TMP007 is two-wire and SMBus compatible. Figure 23 to Figure 26 describe the various operations on the TMP007. Parameters for Figure 23 are defined in Table 5. Bus definitions are:
The receiver acknowledges the transfer of data. It is also possible to use the TMP75B for single-byte updates. To update only the MS byte, terminate communication by issuing a start or stop condition on the bus.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse so that the SDA line is stable low during the high period of the acknowledge clock pulse. Setup and hold times must be taken into account. When a master receives data, the termination of the data transfer can be signaled by the master generating a not-acknowledge (1) on the last byte transmitted by the slave.
FAST MODE | HIGH-SPEED MODE | UNIT | ||||
---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | |||
f(SCL) | SCL operating frequency | 0.001 | 0.4 | 0.001 | 2.5 | MHz |
t(BUF) | Bus free time between stop and start condition | 1300 | 260 | ns | ||
t(HDSTA) | Hold time after repeated start condition. After this period, the first clock is generated. |
600 | 160 | ns | ||
t(SUSTA) | Repeated start condition setup time | 600 | 160 | ns | ||
t(SUSTO) | Stop condition setup time | 600 | 160 | ns | ||
t(HDDAT) | Data hold time | 0 | 900 | 0 | 150 | ns |
t(SUDAT) | Data setup time | 100 | 30 | ns | ||
t(LOW) | SCL clock low period | 1300 | 260 | ns | ||
t(HIGH) | SCL clock high period | 600 | 60 | ns | ||
tF, tR – SDA | Data fall and rise time | 300 | 80 | ns | ||
tF, tR – SCL | Clock fall and rise time | 300 | 40 | ns | ||
tR | Rise time for SCL ≤ 100 kHz | 1000 | ns |
Because the measured object temperature depends on TDIE, transient thermal events that change the die temperature affect the measurement. To compensate for this effect, the TMP007 math engine incorporates a transient correction option for use in applications where a thermal transient is anticipated. When transient correction is turned on, a filter with programmable coefficients is used to modify the sensor voltage result before the object temperature is calculated. This function helps reduce the jump in the object temperature result when there are large transients of the local die temperature, TDIE. The compensation incorporates the rate of change of TDIE and of VOBJ. The modified value for the sensor voltage used in VSENSOR to calculate the object temperature is shown in Equation 9:
where
As a general guideline, turn on transient correction when the local temperature is changing at a rate greater than 1.5°C/min. When transient correction is on, the function corrects transients up to approximately 20°C/min.
Turning on the transient correction also turns on the output filter shown in Equation 10:
If only the use of the output filter is desired without the input transient correction arithmetic, set the TC0 and TC1 coefficient values to 0 with TC bit in configuration register set to 1. When transition correction is on, the response to a step change has a time constant of approximately five times the sampling time.
When transient correction is on, the math engine modifies the sensor voltage result based on the transient correction equations. The nonmodified sensor voltage can be recovered with TC on by setting the TC1 and TC0 coefficients to 0. The output filtering cannot be turned off with TC bit set to 1.
The INT mode maintains the alert condition until a host controller clears the alert condition by reading the status register. This mode is useful when an external microcontroller is actively monitoring TMP007 as part of a thermal management system. The COMP mode asserts the ALERT pin and flags whenever the alert condition occurs, and deasserts the ALERT pin and flags without external intervention when the alert condition is no longer present This mode is often used to notify an external agent of an alert condition.
When servicing an alert from the TMP007, in some cases it may be useful to validate the alert condition by checking the status of the nDV, MEM_CRPT, and DATA_OVF flags.
In this mode the high and low limits form a limit window. The ALRTEN bit must be asserted if the ALERT pin functionality is desired. If the calculated temperature is above the high limit or below the low limit at the end of a conversion its respective enabled flag is asserted.
After the flag is asserted, it can only be cleared by a read of the status register, which clears the flag and the pin. The ALERT pin can also be cleared by the SMB alert response command (see the SMBus Alert Function section); however, this action does not clear the flag.
In COMP mode, the limits are used to form an upper limit threshold detector. If the calculated temperature is above the high limit, the high limit flag is asserted. The high limit flag is then deasserted only after the temperature goes below the low limit. The low limit register value determines the degree of hysteresis in the COMP function. In COMP mode, only the high limit enable has effect on the limit flags. The low limit enable flag does not have any effect on the low limit flags and the low limit flags always read 0. In this mode, the flags are asserted and deasserted only at the end of a conversion and cannot be cleared by a status register read or an SMB alert response.
The TMP007 has an internal memory that can be programmed eight times. This internal memory stores power-on reset (POR) values for all writeable registers in the register map. The default POR values for each register are used if their memory location has not been overwritten through the I2C interface. The stored values in memory are loaded at power up, software reset, general load command, single load command, or SMBus general call reset.
On a memory store, bits NWr2:0 are incremented and indicate the number of writes remaining, as described in Table 6. Note the ambiguity in condition for code 000. Every memory location is individually writable, and the value returned for NWr depends on how many times that individual memory location has previously been written.
NWr_2 | NWR_1 | NWR_0 | TOTAL NUMBER WRITES PERFORMED | TOTAL NUMBER OF WRITES REMAINING |
---|---|---|---|---|
0 | 0 | 0 | 0 | 8 |
0 | 0 | 0 | 1 | 7 |
0 | 0 | 1 | 2 | 6 |
0 | 1 | 0 | 3 | 5 |
0 | 1 | 1 | 4 | 4 |
1 | 0 | 0 | 5 | 3 |
1 | 0 | 1 | 6 | 2 |
1 | 1 | 0 | 7 | 1 |
1 | 1 | 1 | 8 | 0 |
To program the memory, write the desired value in the appropriate register address. Then write to the memory access register (2Ah) with 6Ah in the MSB (B15:B8), the 5-bit register address in B7:B3, and 1 in B1 (the single write bit in the same write operation). If 6Ah prefix code is not written, then the write operation is ignored. A sample flow is shown in Figure 29.
Write Value to Target Register |
Write to Memory Access Register Address 2Ah |
2Ah Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Name | NWr_2 | NWr_1 | NWr_0 | Mem. Crpt | – | – | – | – | Adr4 | Adr3 | Adr2 | Adr1 | Adr0 | Gen Load | MEM Store | Sin Load. |
Value | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | A4 | A3 | A2 | A1 | A0 | 0 | 1 | 0 |
Clear Target Register |
Write to Memory Access Register (2Ah) to Load Value from Memory to Target Register |
2Ah Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Name | NWr_2 | NWr_1 | NWr_0 | Mem. Crpt | – | – | – | – | Adr4 | Adr3 | Adr2 | Adr1 | Adr0 | Gen Load | MEM Store | Sin Load. |
Value | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | A4 | A3 | A2 | A1 | A0 | 0 | 0 | 1 |
Read Target Register to Verify Programming |
The internal memory is accessed and the contents transferred to the registers on power up, single load, general load and reset operations. The transfer from internal memory to the registers takes 3 ms, during which the serial interface is disabled.
The serial interface does not acknowledge while the memory values are being loaded to the registers, and the device stops any data conversions in progress. The loaded values programmed in the register can be overwritten through the serial bus after the load. General load can be used to load all the registers from memory values at once. The NWr bits indicate the number of times a particular memory location has been written to. It is important to note that after a value has been overwritten in the memory, previous values are no longer accessible. Only the most recently written value is transferred from the memory to the register or registers.
The TMP007 registers contain the results of measurements, status information, temperature limit information for setting alert thresholds for both interrupt and compare modes, and the values of the coefficients and parameters currently being used.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
V15 | V14 | V13 | V12 | V11 | V10 | V9 | V8 | V7 | V6 | V5 | V4 | V3 | V2 | V1 | V0 |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
V15 to V0 : | Sensor Voltage Result. Bits 15:0 |
Range: ±5.12 mV | |
Resolution: 156.25 nV/LSB | |
This is the digitized IR sensor voltage output in twos complement format. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
T13 | T12 | T11 | T10 | T9 | T8 | T7 | T6 | T5 | T4 | T3 | T2 | T1 | T0 | 0 | 0 |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
T13 to T0: | Temperature result. Bits 15 to 2. |
The data format is 14 bits, 0.03125°C per LSB in twos complement format. Full scale allows a result of up to ±256°C. Reset value is 00h. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RST | — | — | MOD | CR2 | CR1 | CR0 | ALRTEN | ALRTF | TC | INT/ COMP |
— | — | — | — | — |
R/W-0 | R/W-0 | R/W-0 | R/W-1 | R/W-0 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Note: | Writing to the Configuration register will restart the ADC conversion (unless the write is to put the device in shutdown mode) | |||
RST: | Software Reset Bit. Bit 15 (Write Only) Writing 1 to this bit generates a system reset that is the same as power on reset. It will reset all registers to default values including configuration register. This bit self-clears. Any conversion in progress is terminated. |
MOD: | Conversion Mode Select, Bit 12 (Read/Write) |
Mode | MOD |
Power Down | 0 |
Conversion ON | 1 (default) |
Selects the conversion mode of the device. |
CR2 to CR0: | Conversion Rate/Averaging Mode Bits. Bits 11 to 9 | |||
Controls the Number of conversions used to generate the value in the VSensor and TDIE registers. | ||||
There are a number of conversion modes available. | ||||
CR2 | CR1 | CR0 | NUMBER OF AVERAGES PER CONVERSION | TOTAL CONVERSION TIME (s) | IQ µA AVERAGE |
0 | 0 | 0 | 1 | 0.26 | 270 |
0 | 0 | 1 | 2 | 0.51 | 270 |
0 | 1 | 0 | 4 (default) | 1.01 | 270 |
0 | 1 | 1 | 8 | 2.01 | 270 |
1 | 0 | 0 | 16 | 4.01 | 270 |
1 | 0 | 1 | 1 | 1.0 (Idle for 0.75) | 85 |
1 | 1 | 0 | 2 | 4.0 ( Idle for 3.5) | 60 |
1 | 1 | 1 | 4 | 4.0 (Idle for 3.0) | 85 |
ALRTEN: | Alert Pin Enable. Bit 8 Makes ALERT pin controlled by the alert flag bit. The ALERT pin is active low. The ALRTEN bit is mirrored in the status mask and enable register. Writing to the ALRTEN bit in the status mask and enable register also sets this bit, and vice versa. |
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ALRTF: | Cumulative Alert Flag. Bit 7 (Read Only) This flag is the logical OR of all enabled flags, and is cleared when the status register is read in INT mode or at the end of a conversion when all enabled flags are 0 in COMP mode. It is mirrored in Status register. |
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TC: | Transient Correction Enable. Bit 6 Setting this bit turns on the transient correction enabling sensor voltage and object temperature output filtering. |
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INT/COMP: | INT/COMP Mode. Bit 5 The INT/COMP bit controls whether the limit flags are in INTERRUPT (INT) Mode (0) or COMPARATOR (COMP) Mode (1). It controls the behavior of the limit flags (LH, LL, OH, OL) and the data invalid flag (nDVF) from the status register. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
T13 | T12 | T11 | T10 | T9 | T8 | T7 | T6 | T5 | T4 | T3 | T2 | T1 | T0 | — | nDV |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
T13 to T0: | Temperature result. Bits 15 to 2 The data format is twos complement, 14 bits, and 0.03125°C per LSB. Full scale allows a result of up to ±256°C. Reset value is 00h. |
nDV: | Data invalid bit. Bit 0 If this bit is set, it indicates that the calculated object temperature is not valid due to invalid operations in the math engine. The bit is reset in the next valid conversion. |
The status register flags are activated whenever their limit is violated, and latch if the INT/COMP bit is in INT mode (see configuration register). In INT mode these flags are cleared only when the status register is read. If the flag is set from a previous conversion, and at the end of the next conversion, the corresponding limit is not violating anymore, the flag is not cleared when in INT mode. In COMP mode, these flags are set whenever the corresponding limit is violated at the end of a conversion, and cleared if they are not.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ALRTF | CRTF | OHF | OLF | LHF | LLF | nVDF | MCRPT | SNRL | — | — | — | — | — | — | — |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
ALRTF: | Cumulative Alert Flag Bit. Bit 15 This flag is the logical OR of all enabled flags, and is cleared when the status register is read in INT mode or at the end of a conversion when all enabled flags are 0 in COMP mode. |
CRTF: | Conversion Ready Flag. Bit 14 The conversion ready flag is provided to help coordinate one-shot conversions for temperature measurements. The bit is set after the local and object temperature conversions have completed and the results are ready to be read in the result registers. This flag can be cleared by reading the status register, writing to the configuration register or reading any of the results registers (TDIE, TOBJ, and so on). This flag is not affected by the INT/COMP bit setting and is always in latched mode. |
OHF: | Object Temperature High Limit Flag. Bit 13 This bit is set to 1 if the result in the object temperature register exceeds the value in the object temperature high limit register. In INT mode, this bit is cleared when the status register is read. |
OLF: | Object Temperature Low Limit Flag. Bit 12 This bit is set to 1 if the result in the object temperature register is less than the value in the object temperature low limit register. In INT mode, this bit is cleared when the status register is read. In COMP mode, this bit is disabled and always reads 0. |
LHF: | Local Temperature (TDIE) High Limit Flag. Bit 11 This bit is set to 1 if the result in the TDIE local temperature result register exceeds the value in the local temperature high limit register. In COMP mode, the bit is cleared to 0 when the result in the TDIE local temperature result register is less than the object temperature low limit. In INT mode, the bit is cleared when the status register is read. |
LLF: | Local Temperature (TDIE) Low Limit Flag. Bit 10 This bit is set to 1 if the result in the TDIE local temperature result register goes below the value in the local temperature low limit register. In INT mode, the bit is cleared when the status register is read. In COMP mode, the bit is disabled and always reads 0. |
nDVF: | Data Invalid Flag. Bit 9 If the calculated object temperature is invalid due to an internal error in the math engine or if sensor voltage is out of range, then Data invalid flag is set. In INT mode, this flag can only be cleared by reading the status register. In COMP mode it is cleared at the end of the conversion if the calculated object temperature and sensor voltage are valid. |
MCRPT: | Memory Corrupt Flag. Bit 8. This flag indicates an internal check on the memory failed. This check is automatically performed only on a general load of the registers from memory that is done right after a power on reset, general call reset, or software reset (RST bit in the configuration register), or by forcing loads through the memory access register. When this bit is set, it can only be cleared by a clean pass of the internal check on memory. Mirror of this bit is in memory access register, bit 12. |
DOF: | IR Data Overflow DATA_OVF Flag: Bit 7. This flag indicates if sensor voltage measured is over range. Combined with the data invalid bit, it tells why data is invalid. |
Bits 6 to 0: Not used. These bits always read 0. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ALRTEN | CRTEN | OHEN | OLEN | LHEN | LLEN | DVEN | MEM_C_EN | — | — | — | — | — | — | — | — |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
ALRTEN: | Alert Flag Enable Bit. Bit 15 0: ALRTF flag in status register cannot activate ALERT pin. 1: ALRTF flag any enabled flag in Status register will activate ALERT pin. Can also be set by its mirror in Configuration register, bit 8. |
CRTEN: | Temperature Conversion Ready Enable Bit. Bit 14 0: CRTF flag in status register cannot activate ALRTF 1: CRTF flag in Status register will activate ALRTF. |
OHEN: | Object Temperature High Limit Enable Bit. Bit 13 0: OHF flag in Status register cannot activate ALRTF. 1: OHF flag in Status register will activate ALRTF. |
OLEN: | Object Temperature Low Limit Enable Bit. Bit 12 INT Mode: 0: OLF flag in Status register cannot activate ALRTF. 1: OLF flag in Status register will activate ALRTF. COMP Mode: This bit is disabled in COMP mode and will always read 0. |
LHEN: | TDIE Temperature High Limit Enable Bit. Bit 11 0: AHF flag in Status register cannot activate ALRTF. 1: AHF flag in Status register will activate ALRTF in INT mode |
LLEN: | TDIE Temperature Low Limit Enable Bit. Bit 10 INT Mode (Alert Mode): 0: ALF flag in Status register cannot activate ALRTF. 1: ALF flag in Status register will activate ALRTF in INT mode COMP Mode: This bit is disabled in COMP mode and always read 0. |
DVEN: | Data invalid Flag Enable Bit. Bit 9 0: Data invalid Flag in Status register cannot activate ALRTF. 1: Data invalid Flag in Status register will activate ALRTF. |
MEM_C_EN: | Memory Corrupt Enable Bit. Bit 8 0: Memory Corrupt flag in Status register cannot activate ALRTF. 1: Memory Corrupt flag in Status register will activate ALRTF. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
T9 | T8 | T7 | T6 | T5 | T4 | T3 | T2 | T1 | T0 | — | — | — | — | — | — |
R/W-0 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
T9 to T0: | Object Temperature High Limit. Bits 15 to 6 The data format is 10 bits, 0.5°C per bit. Full scale allows a result of up to ±256C. Twos complement data. |
Bits 5 to 0: | Not used; these bits always read 0. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
T9 | T8 | T7 | T6 | T5 | T4 | T3 | T2 | T1 | T0 | — | — | — | — | — | — |
R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
T9 to T0: | Object Temperature Low Limit. Bits 15 to 6 The data format is 10 bits, 0.5°C per bit. Full scale allows a result of up to ±256C. Twos complement data. |
Bits 5 to 0: | Not used; these bits always read 0. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
T9 | T8 | T7 | T6 | T5 | T4 | T3 | T2 | T1 | T0 | — | — | — | — | — | — |
R/W-0 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
T9 to T0: | TDIE Temperature High Limit. Bits 15 to 6 The data format is 10 bits with LSB of 0.5°C. Full scale allows a result of up to ±256C. Twos complement data. |
Bits 5 to 0: | Not used; these bits always read 0. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
T9 | T8 | T7 | T6 | T5 | T4 | T3 | T2 | T1 | T0 | — | — | — | — | — | — |
R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
T9 to T0: | TDIE Temperature Low Limit. Bits 15 to 6. The data format is 10 bits with LSB of 0.5°C. Full scale allows a result of up to ±256C. Twos complement data. |
Bits 5 to 0: | Not used; these bits always read 0. |
The values of the coefficient registers described above are used in the math engine. The range and resolution of the coefficients are shown in Table 9. The default coefficients, TC0 and TC1, are optimized for the default conversion mode (four averages per measurement). Different acquisition modes may require different values for the TC0 and TC1 coefficients.
REGISTER ADDRESS | VARIABLE | BITS | RANGE | RESOLUTION | DEFAULT VALUES | HEX DEFAULT VALUES |
---|---|---|---|---|---|---|
0A | S0 | 16 | 0 – 298E-15 | LSB = 4.5475E-18 | 4.430E-14 | 0260Eh |
0B | A1 | 16 | ±125E-3 | LSB = 3.8150E-06 | 9.995E-04 | 0106h |
0C | A2 | 16 | ±1.9E-3 | LSB = 5.9600E-08 | –6.020E-06 | FF9Bh |
0D | B0 | 16 | ±5.12E-3 | LSB = 1.5625E-07 | –3.094E-05 | FF3Ah |
0E | B1 | 16 | ±20E-6 | LSB = 6.1035E-10 | –8.728E-08 | FF71h |
0F | B2 | 16 | ±312E-9 | LSB = 9.5367E-12 | 1.300E-08 | 0553h |
10 | C2 | 12 | ±97.65 | LSB = 4.7680E-02 | 0 | 0000h |
11 | TC0 | 16 | ±163E-3 | LSB = 5.0000E-06 | 2.600E-04 | 0034h |
12 | TC1 | 16 | ±1024 | LSB = 3.1250E-02 | 0 | 0000h |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
S0_15 | S0_14 | S0_13 | S0_12 | S0_11 | S0_10 | S0_9 | S0_8 | S0_7 | S0_6 | S0_5 | S0_4 | S0_3 | S0_2 | S0_1 | S0_0 |
R/W-0 | R/W-0 | R/W-1 | R/W-0 | R/W-0 | R/W-1 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-1 | R/W-1 | R/W-1 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
S0_15 to S0_0: | S0 Coefficient Value. Bits 15 to 0. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
A1_15 | A1_14 | A1_13 | A1_12 | A1_11 | A1_10 | A1_9 | A1_8 | A1_7 | A1_6 | A1_5 | A1_4 | A1_3 | A1_2 | A1_1 | A1_0 |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-1 | R/W-1 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
A1_15 to A1_0: | A1 Coefficient Value. Bits 15 to 0. Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
A2_15 | A2_14 | A2_13 | A2_12 | A2_11 | A2_10 | A2_9 | A2_8 | A2_7 | A2_6 | A2_5 | A2_4 | A2_3 | A2_2 | A2_1 | A2_0 |
R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-0 | R/W-0 | R/W-1 | R/W-1 | R/W-0 | R/W-1 | R/W-1 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
A2_15 to A2_0: | A2 Coefficient Value. Bits 15 to 0 Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
B0_15 | B0_14 | B0_13 | B0_12 | B0_11 | B0_10 | B0_9 | B0_8 | B0_7 | B0_6 | B0_5 | B0_4 | B0_3 | B0_2 | B0_1 | B0_0 |
R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-0 | R/W-0 | R/W-1 | R/W-1 | R/W-1 | R/W-0 | R/W-1 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
B0_15 to B0_0: | B0 Coefficient Value. Bits 15 to 0 Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
B1_15 | B1_14 | B1_13 | B1_12 | B1_11 | B1_10 | B1_9 | B1_8 | B1_7 | B1_6 | B1_5 | B1_4 | B1_3 | B1_2 | B1_1 | B1_0 |
R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-0 | R/W-1 | R/W-1 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-1 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
B1_15 to B1_0: | B1 Coefficient Value. Bits 15 to 0 Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
B2_15 | B2_14 | B2_13 | B2_12 | B2_11 | B2_10 | B2_9 | B2_8 | B2_7 | B2_6 | B2_5 | B2_4 | B2_3 | B2_2 | B2_1 | B2_0 |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-1 | R/W-0 | R/W-1 | R/W-0 | R/W-1 | R/W-0 | R/W-1 | R/W-0 | R/W-0 | R/W-1 | R/W-1 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
B2_15 to B2_0: | B2 Coefficient Value. Bits 15 to 0 Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
C2_11 | C2_10 | C2_9 | C2_8 | C2_7 | C2_6 | C2_5 | C2_4 | C2_3 | C2_2 | C2_1 | C2_0 | — | — | — | — |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
C2_11 to C2_0: | C2 Coefficient Value. Bits 15 to 4 Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TC0_ 15 |
TC0_ 14 |
TC0_ 13 |
TC0_ 12 |
TC0_ 11 |
TC0_ 10 |
TC0_9 | TC0_8 | TC0_7 | TC0_6 | TC0_5 | TC0_4 | TC0_3 | TC0_2 | TC0_1 | TC0_0 |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-1 | R/W-1 | R/W-0 | R/W-1 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
TC0_15 to TC0_0: | TC0 Coefficient Value. Bits 15 to 0 Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TC1_ 15 |
TC1_ 14 |
TC1_ 13 |
TC1_ 12 |
TC1_ 11 |
TC1_ 10 |
TC1_9 | TC1_8 | TC1_7 | TC1_6 | TC1_5 | TC1_4 | TC1_3 | TC1_2 | TC1_1 | TC1_0 |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
TC1_15 to TC1_0: | TC1 Coefficient Value. Bits 15 to 0 Twos complement format. Range and resolution given in Table 9 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ID15 | ID14 | ID13 | ID12 | ID11 | ID10 | ID9 | ID8 | ID7 | ID6 | ID5 | ID4 | ID3 | ID2 | ID1 | ID0 |
R-0 | R-1 | R-0 | R-1 | R-0 | R-1 | R-0 | R-0 | R-0 | R-1 | R-0 | R-0 | R-1 | R-0 | R-0 | R-1 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
ID15 to ID0: | Manufacturer ID Bits. Bits 15 to 0. Reads 'TI' in ASCII code. |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DID11 | DID10 | DID9 | DID8 | DID7 | DID6 | DID5 | DID4 | DID3 | DID2 | DID1 | DID0 | RID3 | RID2 | RID1 | RID0 |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-1 | R-1 | R-1 | R-1 | R-0 | R-0 | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
DID11 to DID0: | Device ID Bits. Bits 15 to 4. Reads 007h. |
RID3 to RID0: | Revision ID Bits. Bits 3 to 0. Reads 8h. |
The internal memory can be accessed through the memory access register. When the register is read, it returns the values in read name. When the register is written to, it must contain the value 6Axxh to enable the contents of the register specified by Adr4 to Adr0 to be stored in memory.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
nwR_2 | nwR_1 | nwR_0 | Mem Crpt | — | — | — | — | Adr4 | Adr3 | Adr2 | Adr1 | Adr0 | 0 | 0 | 0 |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | Adr4 | Adr3 | Adr2 | Adr1 | Adr0 | General Load | Mem Store | Single Load |
N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
LEGEND: N/A = reset value not applicable for write operation. |
nwR_2 to nwR_0: | Number of Programs. Bits 15 to 13. A memory location can be programmed a maximum of eight times. These bits contain the number of times this location has been programmed. After the eighth programming to a given location, subsequent attempts to program are ignored. |
Mem Crpt: | Memory Corrupt. Bit 12 (read only). This bit is a mirror of bit 8 in the status register. |
Adr4 to Adr0: | Memory Address. Bits 7 to 3. Used to specify register address to operate on. Address here is the same as the register in register address table.. |
General Load: | General Load. Bit 2 (write only). Loads all registers from memory with the last value stored in memory for that register. Adr[4:0] are don’t care in this case. |
Mem Store: | Memory Store. Bit 1 (write only). Write 1 to this bit along with the register address to store that registers contents to memory. |
Single Load: | Single Load. Bit 0. Performs an load of the memory contents to the register address determined by the Adr[4:0] bits. |