JAJSGC5D February 2011 – December 2018 TMP103
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
For the two-wire bus to operate at frequencies greater than 400 kHz, the master device must issue an Hs-mode master code (00001xxx) as the first byte after a START condition to switch the bus to high-speed operation. The TMP103 does not acknowledge this byte, but switches its input filters on SDA and SCL and its output filters on SDA to operate in Hs-mode, allowing transfers at up to 3.4 MHz. After the Hs-mode master code has been issued, the master transmits a START condition followed by a two-wire slave address to initiate a data transfer operation. The bus continues to operate in Hs-mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP103 switches the input and output filters back to the default fast-mode operation.