JAJSGD7E June   2009  – December 2018 TMP302

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      トリップ・スレッショルド精度
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 HYSTSET
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Configuring the TMP302
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Typical Characteristics

At TA = 25°C and VS = 3.3 V, unless otherwise noted.
TMP302 tc_trip_acc_err_temp_slos889.gif
30 typical units
Figure 1. Trip Accuracy Error vs Temperature
TMP302 tc_iq_temp_slos889.gif
Figure 2. Quiescent Current vs Temperature
TMP302 tc_temp_step_resp_time_slos889.gif
Figure 3. Temperature Step Response in Perfluorinated Fluid at 100°C vs Time
TMP302 tc_trip_thresh_histo_slos889.gif
Figure 5. Trip Threshold Accuracy
TMP302 tc_pu_pd_tr_slos889.gif
Figure 7. Power-Up and Power-Down Response
TMP302 tc_therm_step_resp_air_time_slos889.gif
Figure 4. Thermal Step Response in Air at 100°C vs Time
TMP302 tc_output_log_low_temp_slos889.gif
VS = 1.4 V IOL = 2 mA
Figure 6. Output Logic-Level Low VOL vs Temperature
TMP302 tc_pu_trip_pd_tr_slos889.gif
TMP302A, TA = 55°C TRIPSET1 = TRIPSET0 = GND
Figure 8. Power-Up, Trip, and Power-Down Response