JAJSJN1A May 2023 – September 2023 TMP4718
PRODUCTION DATA
For a read operation, the controller sends a START condition followed by the target address with the R/W bit set to 0 (signifying a write). The target acknowledges the write request, and the controller sends the Register Pointer. After the Register Pointer, the host will initiate a restart followed by the target address with the R/W bit set to 1 (signifying a read). The controller will continue to send out clock pulses but releases the SDA line so that the target can transmit data. At the end of every byte of data, the controller sends an ACK to the target, letting the target know that the controller is ready for more data. Figure 8-13 shows an example of reading a single byte from a target register. The TMP4718 does not support multiple register reads with a single transaction.
If repeated reads from the same register are desired, the pointer register bytes do not have to be continually sent, as shown in Figure 8-14. The TMP4718 remembers the pointer register value until the value is changed by the next write operation. Note after the device POR, the pointer address is defaulted to 0h. Therefore, the controller can read (and re-read) the Temp_Local register content without setting the pointer value.