JAJSDV7F June 2009 – January 2017 TMS320C6742
PRODUCTION DATA.
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The device contains up to three enhanced capture (eCAP) modules. Figure 6-45 shows a functional block diagram of a module.
Uses for ECAP include:
The ECAP module described in this specification includes the following features:
The eCAP modules are clocked at the ASYNC3 clock domain rate.
Table 6-71 is the list of the ECAP registers.
ECAP0
BYTE ADDRESS |
ECAP1
BYTE ADDRESS |
ECAP2
BYTE ADDRESS |
ACRONYM | DESCRIPTION |
---|---|---|---|---|
0x01F0 6000 | 0x01F0 7000 | 0x01F0 8000 | TSCTR | Time-Stamp Counter |
0x01F0 6004 | 0x01F0 7004 | 0x01F0 8004 | CTRPHS | Counter Phase Offset Value Register |
0x01F0 6008 | 0x01F0 7008 | 0x01F0 8008 | CAP1 | Capture 1 Register |
0x01F0 600C | 0x01F0 700C | 0x01F0 800C | CAP2 | Capture 2 Register |
0x01F0 6010 | 0x01F0 7010 | 0x01F0 8010 | CAP3 | Capture 3 Register |
0x01F0 6014 | 0x01F0 7014 | 0x01F0 8014 | CAP4 | Capture 4 Register |
0x01F0 6028 | 0x01F0 7028 | 0x01F0 8028 | ECCTL1 | Capture Control Register 1 |
0x01F0 602A | 0x01F0 702A | 0x01F0 802A | ECCTL2 | Capture Control Register 2 |
0x01F0 602C | 0x01F0 702C | 0x01F0 802C | ECEINT | Capture Interrupt Enable Register |
0x01F0 602E | 0x01F0 702E | 0x01F0 802E | ECFLG | Capture Interrupt Flag Register |
0x01F0 6030 | 0x01F0 7030 | 0x01F0 8030 | ECCLR | Capture Interrupt Clear Register |
0x01F0 6032 | 0x01F0 7032 | 0x01F0 8032 | ECFRC | Capture Interrupt Force Register |
0x01F0 605C | 0x01F0 705C | 0x01F0 805C | REVID | Revision ID |
Table 6-72 shows the eCAP timing requirement and Table 6-73 shows the eCAP switching characteristics.