SPNS253A May 2018 – September 2019 TMS570LC4357-EP
PRODUCTION DATA.
The TBCLKSYNC bit can be used to globally synchronize the time-base clocks of all enabled ePWM modules on a device. This bit is implemented as PINMMR166[1] register bit 1.
When TBCLKSYNC = 0, the time-base clock of all ePWM modules is stopped. This is the default condition.
When TBCLKSYNC = 1, all ePWM time-base clocks are started with the rising edge of TBCLK aligned.
For perfectly synchronized TBCLKs, the prescaler bits in the TBCTL register of each ePWM module must be set identically. The proper procedure for enabling the ePWM clocks is as follows: