TMS570LC4357-EP

アクティブ

エンハンスド製品、Arm Cortex-R5F 採用、EMAC と FlexRay 搭載、16/32 ビット RISC 型フラッシュ・マイコン (MCU)

製品詳細

Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
NFBGA (GWT) 337 256 mm² 16 x 16
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM® Cortex® - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules™ Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight™ Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM™, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM® Cortex® - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules™ Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight™ Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM™, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

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技術資料

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート TMS570LC4357-EP Hercules™ Microcontroller Based on the ARM® Cortex®-R Core データシート (Rev. A) PDF | HTML 2019年 9月 18日
* エラッタ TMS570LC4357 Microcontroller Silicon Errata (Silicon Revision A) (Rev. D) 2016年 5月 31日
* VID TMS570LC4357-EP VID V62/186060-01XF 2020年 9月 22日
* ユーザー・ガイド TMS570LC43x 16/32 RISC Flash Microcontroller Technical Reference Manual (Rev. A) 2018年 3月 1日
証明書 TUEV SUED Certification for TMS570LC43x (Rev. A) 2024年 6月 21日
機能安全情報 Certification for Functional Safety Hardware Process (Rev. B) 2022年 6月 9日
その他の技術資料 Hercules™ Diagnostic Library Test Automation Unit User Guide (Rev. B) PDF | HTML 2020年 1月 9日
その他の技術資料 HALCoGen-CSP 04.07.01 (Rev. C) PDF | HTML 2020年 1月 8日
機能安全情報 HALCoGen-CSP Installation Guide (Rev. B) PDF | HTML 2020年 1月 8日
機能安全情報 HALCoGen-CSP User's Guide (Rev. C) PDF | HTML 2020年 1月 8日
機能安全情報 Hercules Diagnostic Library -TAU Installation Guide (Rev. B) PDF | HTML 2020年 1月 8日
ユーザー・ガイド Hercules Diagnostic Library CSP Without LDRA 2019年 10月 29日
その他の技術資料 Diagnostic Library CSP Release Notes 2019年 10月 17日
アプリケーション・ノート HALCoGen Ethernet Driver With lwIP Integration Demo and Active Webserver Demo PDF | HTML 2019年 9月 13日
アプリケーション・ノート Hercules PLL Advisory SSWF021#45 Workaround (Rev. B) PDF | HTML 2019年 9月 9日
アプリケーション・ノート CAN Bus Bootloader for Hercules Microcontrollers PDF | HTML 2019年 8月 21日
アプリケーション・ノート HALCoGen CSP Without LDRA Release_Notes 2019年 8月 19日
ユーザー・ガイド HALCoGen-CSP Without LDRA Installation Guide PDF | HTML 2019年 8月 19日
ユーザー・ガイド HALCoGen-CSP Without LDRA User's Guide PDF | HTML 2019年 8月 19日
ユーザー・ガイド Hercules Diagnostic Library - Without LDRA Installation Guide PDF | HTML 2019年 8月 19日
ユーザー・ガイド Hercules™ Diag Lib Test Automation Unit Without LDRA User's Guide PDF | HTML 2019年 8月 19日
機能安全情報 Certification for SafeTI Functional Safety Hardware Process (Rev. A) 2019年 6月 7日
アプリケーション・ノート Interfacing the Embedded 12-Bit ADC in a TMS570LS31x/21x and RM4x Series MCUs (Rev. A) 2018年 4月 20日
アプリケーション・ノート FreeRTOS on Hercules Devices_new 2018年 4月 19日
アプリケーション・ノート MPU and Cache Settings in TMS570LC43x/RM57x Devices 2018年 4月 19日
アプリケーション・ノート Sharing FEE Blocks Between the Bootloader and the Application 2017年 11月 7日
アプリケーション・ノート Sharing Exception Vectors on Hercules™ Based Microcontrollers 2017年 3月 27日
アプリケーション・ノート Hercules AJSM Unlock (Rev. A) PDF | HTML 2016年 10月 19日
機能安全情報 Safety Manual for TMS570LC4x Hercules ARM Safety Critical Microcontrollers (Rev. A) 2016年 10月 19日
アプリケーション・ノート How to Create a HALCoGen Based Project For CCS (Rev. B) 2016年 8月 9日
アプリケーション・ノート Using the CRC Module on Hercules™-Based Microcontrollers 2016年 8月 4日
アプリケーション・ノート Using the SPI as an Extra UART Transmitter 2016年 7月 26日
ホワイト・ペーパー Hercules MCUs for Use in Electrical Vehicle Battery Management system 2016年 5月 12日
機能安全情報 Functional Safety Audit: SafeTI Functional Safety Hardware Development (Rev. A) 2016年 4月 25日
アプリケーション・ノート High Speed Serial Bus Using the MibSPIP Module on Hercules-Based MCUs 2016年 4月 22日
アプリケーション・ノート TMS570LC4357 and RM57L843 On-Chip Temperature Sensor Measurements 2016年 1月 18日
機能安全情報 Enabling Functional Safety Using SafeTI Diagnostic Library 2015年 12月 18日
アプリケーション・ノート Triggering ADC Using Internal Timer Events on Hercules MCUs 2015年 10月 19日
ホワイト・ペーパー Extending TI’s Hercules MCUs with the integrated flexible HET 2015年 9月 29日
アプリケーション・ノート PWM Generation and Input Capture Using HALCoGen N2HET Module 2015年 6月 30日
機能安全情報 Foundational Software for Functional Safety 2015年 5月 12日
アプリケーション・ノート Sine Wave Generation Using PWM With Hercules N2HET and HTU 2015年 5月 12日
アプリケーション・ノート Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 2015年 5月 1日
アプリケーション・ノート Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 2015年 4月 23日
ホワイト・ペーパー Latch-Up White Paper PDF | HTML 2015年 4月 22日
アプリケーション・ノート Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 2015年 4月 20日
アプリケーション・ノート Monitoring PWM Using N2HET 2015年 4月 2日
アプリケーション・ノート Hercules SCI With DMA 2015年 3月 22日
証明書 TÜV NORD Certificate for Functional Safety Software Development Process 2015年 2月 3日
機能安全情報 Calculating Equivalent Power-on-Hours for Hercules Safety MCUs 2015年 1月 26日
機能安全情報 TUV SUD ISO-13849 Safety Architecture Concept Study 2014年 7月 2日
その他の技術資料 HaLCoGen Release Notes 2014年 6月 25日
機能安全情報 Hercules TMS570LC/RM57Lx Safety MCUs Development Insights Using Debug and Trace 2014年 5月 21日
アプリケーション・ノート Interfacing TPS65381 With Hercules Microcontrollers (Rev. A) 2014年 2月 14日
ユーザー・ガイド Trace Analyzer User's Guide (Rev. B) 2013年 11月 18日
機能安全情報 IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 2013年 10月 3日
ホワイト・ペーパー Model-Based Tool Qualification of the TI C/C++ ARM® Compiler 2013年 6月 6日
アプリケーション・ノート Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 2012年 7月 5日
アプリケーション・ノート Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 2012年 4月 12日
アプリケーション・ノート Verification of Data Integrity Using CRC 2012年 2月 17日
アプリケーション・ノート FlexRay Transfer Unit (FTU) Setup 2012年 1月 26日
ユーザー・ガイド HET Integrated Development Environment User's Guide (Rev. A) 2011年 11月 17日
機能安全情報 Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 2011年 11月 17日
機能安全情報 Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 2011年 11月 4日
アプリケーション・ノート Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 2011年 9月 27日
アプリケーション・ノート 3.3 V I/O Considerations for Hercules Safety MCUs (Rev. A) 2011年 9月 6日
機能安全情報 Hercules ARM セーフティ MCU の A/D コンバータの信号源インピーダンスについて (Rev. B) 2011年 9月 6日
機能安全情報 Hercules ARM セーフティー MCU の CAN ノードの設定について 2011年 9月 6日
機能安全情報 Leveraging the High-End Timer Transfer Unit on Hercules ARM Safety MCUs (Rev. A) 2011年 9月 6日
機能安全情報 UART 通信のための Hercules ARM セーフティー MCU SCI/LIN モジュールの設定について (Rev. A) 2011年 9月 6日
機能安全情報 Hercules™ Microcontrollers: Real-time MCUs for safety-critical products 2011年 9月 2日
アプリケーション・ノート ECC handling in TMSx70 based microcontrollers 2011年 2月 23日
ユーザー・ガイド TI ICEPick Module Type C Reference Guide Public Version 2011年 2月 17日
アプリケーション・ノート NHET Getting Started (Rev. B) 2010年 8月 30日
機能安全情報 Usage of MPU Subregions on TI Hercules ARM Safety MCUs 2010年 3月 10日
ユーザー・ガイド TI Assembly Language Tools Enhanced High-End Timer (NHET) Assembler User's Guide 2010年 3月 4日
ホワイト・ペーパー Discriminating between Soft Errors and Hard Errors in RAM White Paper 2008年 6月 4日

設計および開発

その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。

デバッグ・プローブ

TMDSEMU200-U — XDS200 USB デバッグ・プローブ

XDS200 は、TI の組込みデバイスのデバッグに使用できるデバッグ・プローブ (エミュレータ) です。XDS200 は、低コストの XDS110 と高性能の XDS560v2 に比べて、低コストと良好な性能のバランスを特長としています。単一のポッド (筐体) で、多様な規格 (IEEE1149.1、IEEE1149.7、SWD) をサポートします。すべての XDS デバッグ・プローブは、組込みトレース・バッファ (ETB) を搭載しているすべての Arm® プロセッサと DSP プロセッサで、コア・トレースとシステム・トレースをサポートしています。ピン経由でコア・トレースを実行する場合、 (...)

デバッグ・プローブ

TMDSEMU560V2STM-U — XDS560™ ソフトウェア v2 システム・トレース USB デバッグ・プローブ

XDS560v2 は、XDS560™ ファミリのデバッグ・プローブの中で最高の性能を達成し、従来の JTAG 規格 (IEEE1149.1) と cJTAG (IEEE1149.7) の両方をサポートしています。シリアル・ワイヤ・デバッグ (SWD) をサポートしていないことに注意してください。

すべての XDS デバッグ・プローブは、組み込みトレース・バッファ (ETB) を搭載しているすべての ARM プロセッサと DSP プロセッサで、コア・トレースとシステム・トレースをサポートしています。ピン経由でコア・トレースを実行する場合、XDS560v2 PRO TRACE が必要です。

(...)

デバッグ・プローブ

TMDSEMU560V2STM-UE — Spectrum Digital XDS560v2 システム・トレース USB およびイーサネット

The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

開発キット

LAUNCHXL2-570LC43 — Hercules TMS570LC43x LaunchPad 開発キット

Hercules™ TMS570LC43x LaunchPad™ は、最高性能の Hercules マイコンである TMS570LC4357 をベースとする低コストの評価プラットフォームです。このマイコンは、ロックステップ動作のキャッシュ付き 300MHz ARM® Cortex®-R5F をベースとする TMS570 シリーズの車載グレード・マイコンであり、ISO 26262IEC 61508 に関連する機能安全アプリケーションの開発に役立つ設計を採用しています。

この LaunchPad は IEEE 1588 高精度時間のイーサネット PHY である DP83630 (...)

ユーザー ガイド: PDF
開発キット

TMDX570LC43HDK — TMDX570LC43HDK Hercules 開発キット

本キットには、AC アダプタ(直流電源装置)が同梱されておりません。
詳しくは本キットの AC アダプタの定格、仕様をご覧ください。

The TMS570LC43x Hercules Development Kit is ideal for getting started on development with the Hercules TMS570LC4357 high-performance safety microcontrollers. The kit is comprised of a development board, a DC power supply, a mini-B (...)

ユーザー ガイド: PDF
IDE (統合開発環境)、コンパイラ、またはデバッガ

CCSTUDIO Code Composer Studio 統合開発環境(IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It comprises a suite of tools used to develop and debug embedded applications.  Code Composer Studio is available for download across Windows®, Linux® and macOS® desktops. It can also (...)

サポート対象の製品とハードウェア

サポート対象の製品とハードウェア

こちらの設計リソースは、このカテゴリに属する製品の大半をサポートしています。

サポート状況を確認するには、製品の詳細ページをご覧ください。

開始 ダウンロードオプション
サポート・ソフトウェア

VCTR-3P-MICROSAR — マイコンと HPC (高性能コンピュータ) 向け、Vector の MICROSAR AUTOSAR ソフトウェア

MICROSAR と DaVinci の各製品ファミリは、マイコンと HPC 向けの洗練された組込みソフトウェアと強力な開発ツールを通じて、ECU (電子制御ユニット) の開発のシンプル化に寄与します。高度なインフラ ソフトウェアを使用すると、ECU の最適な基盤を製作し、関連ツールを活用して、関係のある多様な開発タスクをシンプルにすることができます。MICROSAR 組込みソフトウェアの開発は、AUTOSAR CLASSIC や ADAPTIVE などの関連規格に準拠しています。このソフトウェアは、ISO 26262 に準拠した ASIL D (...)
シミュレーション・モデル

TMS570LC4357 ZWT Ibis Model

SPNM063.ZIP (617 KB) - IBIS Model
シミュレーション・モデル

TMS570LC43xx ZWT BSDL Model

SPNM050.ZIP (9 KB) - BSDL Model
パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
NFBGA (GWT) 337 Ultra Librarian

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 使用原材料
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報:
  • ファブの拠点
  • 組み立てを実施した拠点

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サポートとトレーニング

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