JAJSKO9A
March 2020 – March 2021
TMUX4157N
PRODUCTION DATA
1
特長
2
アプリケーション
3
説明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Dynamic Characteristics
6.7
Timing Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
7.1
On-Resistance
7.2
Off-Leakage Current
7.3
On-Leakage Current
7.4
Transition Time
7.5
Break-Before-Make
7.6
Prop Delay
7.7
Device Turn on Time
7.8
Charge Injection
7.9
Off Isolation
7.10
Crosstalk
7.11
Bandwidth
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Bidirectional Operation
8.3.2
Rail-to-Rail Operation
8.3.3
1.8 V Logic Compatible Inputs
8.3.4
Fail-Safe Logic
8.4
Device Functional Modes
8.5
Truth Tables
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Negative Voltage Input Control for Power Amplifier
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DCK|6
MPDS114E
サーマルパッド・メカニカル・データ
発注情報
jajsko9a_oa
jajsko9a_pm
12.1.1
Related Documentation
Texas Instruments,
Eliminate Power Sequencing with Powered-off Protection Signal Switches
application brief
.
Texas Instruments,
Improve Stability Issues with Low CON Multiplexers
appication brief
.
Texas Instruments,
Simplifying Design with 1.8 V logic Muxes and Switches
application brief
.
Texas Instruments,
System-Level Protection for High-Voltage Analog Multiplexers
application report
.