JAJSO44A June 2023 – September 2024 TMUX582F-SEP
PRODUCTION DATA
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The TMUX582F-SEP enters into Fault mode when any of the input signals on the source (Sx) pins exceed VFP by a threshold voltage VT. Under the overvoltage condition, the switch input experiencing the fault automatically turns OFF regardless of the digital logic status, and the source pin becomes high impedance with a negligible amount of leakage current flowing through the switch. When the fault channel is selected by the digital logic control, the drain pin (D or Dx) is pulled to the supply that was exceeded through a 40kΩ internal resistor.
In the Fault Mode, the general fault flag (FF) is asserted low. The specific flag (SF) is asserted low when a specific input path is selected, as provided in Table 7-1.
The overvoltage protection is provided only for the source (Sx) input pins. The drain (D or Dx) pin, if used as signal input, must stay in between VFP and GND at all times since no overvoltage protection is implemented on the drain pin.