JAJSGK3A November   2018  – October 2022 TMUX6136

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics (Dual Supplies: ±15 V)
    6. 6.6 Switching Characteristics (Dual Supplies: ±15 V)
    7. 6.7 Electrical Characteristics (Single Supply: 12 V)
    8. 6.8 Switching Characteristics (Single Supply: 12 V)
    9.     Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1  On-Resistance
      2. 7.1.2  Off-Leakage Current
      3. 7.1.3  On-Leakage Current
      4. 7.1.4  Transition Time
      5. 7.1.5  Break-Before-Make Delay
      6. 7.1.6  Charge Injection
      7. 7.1.7  Off Isolation
      8. 7.1.8  Channel-to-Channel Crosstalk
      9. 7.1.9  Bandwidth
      10. 7.1.10 THD + Noise
      11. 7.1.11 AC Power Supply Rejection Ratio (AC PSRR)
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ultralow Leakage Current
      2. 7.3.2 Ultralow Charge Injection
      3. 7.3.3 Bidirectional and Rail-to-Rail Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Truth Table
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2 Detailed Design Procedure

GUID-306050A2-6EDD-488A-B8DC-576E96DD6D9E-low.gifFigure 8-3 FVMC Implementation in PMU Using the TMUX6136
GUID-19A4657D-A60A-4505-B3A4-1CC54F8E592F-low.gifFigure 8-4 FCMV Implementation in PMU Using the TMUX6136

The implementation of the FVMC and FCMV modes can be combined with the use of a dual SPDT switch such as the TMUX6136. Figure 8-3 and Figure 8-4 shows simplified diagrams of such implementations. In the FVMC mode, the switch is toggled to position A and this allows the voltage sense amplifier to become part of the feedback loop and the voltage output of the current sense amplifier to be sampled by the ADC. In the FCMV mode, the switch is toggled to position B, and this allows the current sense amplifier to become part of the feedback loop and the voltage output of the voltage sense amplifier to be sampled by the ADC.