JAJSLE6C July   2020  – July 2024 TMUX6234

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Source or Drain Continuous Current
    6. 5.6  36 V Single Supply: Electrical Characteristics 
    7. 5.7  36 V Single Supply: Switching Characteristics 
    8. 5.8  ±15 V Dual Supply: Electrical Characteristics 
    9. 5.9  ±15 V Dual Supply: Switching Characteristics 
    10. 5.10 12 V Single Supply: Electrical Characteristics 
    11. 5.11 12 V Single Supply: Switching Characteristics 
    12. 5.12 ±5 V Dual Supply: Electrical Characteristics 
    13. 5.13 ±5 V Dual Supply: Switching Characteristics 
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  Transition Time
    5. 6.5  tON(EN) and tOFF(EN)
    6. 6.6  Break-Before-Make
    7. 6.7  tON (VDD) Time
    8. 6.8  Propagation Delay
    9. 6.9  Charge Injection
    10. 6.10 Off Isolation
    11. 6.11 Crosstalk
    12. 6.12 Bandwidth
    13. 6.13 THD + Noise
    14. 6.14 Power Supply Rejection Ratio (PSRR)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Rail-to-Rail Operation
      3. 7.3.3 1.8 V Logic Compatible Inputs
      4. 7.3.4 Fail-Safe Logic
      5. 7.3.5 Latch-Up Immune
      6. 7.3.6 Ultra-Low Charge Injection
    4. 7.4 Device Functional Modes
    5. 7.5 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

5.13 ±5 V Dual Supply: Switching Characteristics 

VDD = +5 V ± 10%, VSS = –5 V ±10%, GND = 0 V (unless otherwise noted) 
Typical at VDD = +5 V, VSS = –5 V, TA = 25℃  (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
tTRAN Transition time from control input VS = 3 V
RL = 300 Ω, CL = 35 pF
Refer to Transition Time		 25°C 120 210 ns
–40°C to +85°C 230 ns
–40°C to +125°C 250 ns
tON (EN) Turn-on time from enable VS = 3 V
RL = 300 Ω, CL = 35 pF
Refer to Section 6.5		 25°C 130 220 ns
–40°C to +85°C 240 ns
–40°C to +125°C 260 ns
tOFF (EN) Turn-off time from enable VS = 3 V
RL = 300 Ω, CL = 35 pF
Refer to Section 6.5		 25°C 120 210 ns
–40°C to +85°C 230 ns
–40°C to +125°C 250 ns
tBBM Break-before-make time delay VS = 3 V,
RL = 300 Ω, CL = 35 pF
Refer to Break-Before-Make		 25°C 65 ns
–40°C to +85°C 1 ns
–40°C to +125°C 1 ns
TON (VDD) Device turn on time
(VDD to output)		 VDD rise time = 1µs 
RL = 300 Ω, CL = 35pF
Refer to Turn-on (VDD) Time		 25°C 0.16 ms
–40°C to +85°C 0.16 ms
–40°C to +125°C 0.16 ms
tPD Propagation delay RL = 50 Ω , CL = 5 pF
Refer to Section 6.8		 25°C 400 ps
QINJ Charge injection VD = 0 V, CL = 100 pF
Refer to Section 6.9		 25°C 1 pC
OISO Off-isolation RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 100 kHz
Refer to Off Isolation		 25°C –82 dB
OISO Off-isolation RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1 MHz
Refer to Off Isolation		 25°C –62 dB
XTALK Crosstalk RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1MHz
Refer to Crosstalk		 25°C –105 dB
BW –3dB Bandwidth  RL = 50 Ω , CL = 5 pF
VS = 0 V
Refer to Bandwidth		 25°C 130 MHz
IL Insertion loss RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1 MHz		 25°C –0.6 dB
ACPSRR AC Power Supply Rejection Ratio VPP = 0.62 V on VDD and VSS
RL = 10 MΩ , CL = 5 pF,
f = 1 MHz
Refer to Section 6.14		 25°C –53 dB
THD+N Total Harmonic Distortion + Noise VPP = 5 V, VBIAS = 0 V
RL  =  10 kΩ , CL = 5 pF,
f = 20 Hz to 20 kHz
Refer to Section 6.13		 25°C 0.002 %
CS(OFF) Source off capacitance VS = 0 V, f = 1 MHz 25°C 20 pF
CD(OFF) Drain off capacitance VS = 0 V, f = 1 MHz 25°C 34 pF
CS(ON), CD(ON) On capacitance VS = 0 V, f = 1 MHz 25°C 80 pF