JAJSLK1A october   2022  – march 2023 TMUX7201 , TMUX7202

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Source or Drain Continuous Current
    6. 6.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 6.7  ±15 V Dual Supply: Switching Characteristics 
    8. 6.8  ±20 V Dual Supply: Electrical Characteristics
    9. 6.9  ±20 V Dual Supply: Switching Characteristics
    10. 6.10 44 V Single Supply: Electrical Characteristics 
    11. 6.11 44 V Single Supply: Switching Characteristics 
    12. 6.12 12 V Single Supply: Electrical Characteristics 
    13. 6.13 12 V Single Supply: Switching Characteristics 
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  tON and tOFF Time
    5. 7.5  tON (VDD) Time
    6. 7.6  Propagation Delay
    7. 7.7  Charge Injection
    8. 7.8  Off Isolation
    9. 7.9  Bandwidth
    10. 7.10 THD + Noise
    11. 7.11 Power Supply Rejection Ratio (PSRR)
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8 V Logic Compatible Inputs
      4. 8.3.4 Integrated Pull-Down Resistor on Logic Pins
      5. 8.3.5 Fail-Safe Logic
      6. 8.3.6 Latch-Up Immune
      7. 8.3.7 Ultra-Low Charge Injection
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TIA Feedback Gain Switch
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RQX|8
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-20210517-CA0I-XJHJ-FFKN-VK9ZZMSW6TXN-low.svgFigure 5-1 DGK Package, 8-Pin VSSOP (Top View)
GUID-20210517-CA0I-ZKC1-GLD7-5H46W1DQXDXT-low.svgFigure 5-2 RQX Package, 8-Pin WSON (Top View)
Table 5-1 Pin Functions
PINTYPE(1)DESCRIPTION(2)
NAMEDGKRQX
S11I/OSource pin. Can be an input or output.
NC22NCNo connection. Not internally connected.
GND33PGround (0 V) reference
VDD44PPositive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.
NC55NCNo connection. Not internally connected.
SEL66ILogic control input, has internal Pull-Down resistor. For information about the switch connection controls, see Section 8.5.
VSS77PNegative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND.
D88I/ODrain pin. Can be an input or output.
Thermal Pad — The thermal pad is not connected internally. No requirement to solder this pad, if connected it is recommended that the pad be left floating or tied to GND
(1) I = input, O = output, I/O = input or output, P = power, NC = no connection.
(2) For what to do with unused pins, refer to Section 8.4.