JAJSF52 April 2018 TPA3126D2
PRODUCTION DATA.
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | MODSEL | I | Mode selection logic input (LOW = Hybrid Mode, HIGH = BD Mode). TTL logic levels with compliance to AVCC. Refer to: Device Modulation Scheme |
2 | SDZ | I | Shutdown logic input for audio amp (LOW = outputs Hi-Z, HIGH = outputs enabled). TTL logic levels with compliance to AVCC. Refer to: Startup and Shutdown Operation |
3 | FAULTZ | DO | General fault reporting including Over-temp, DC Detect. Open drain. Refer to: Device Protection System
FAULTZ = High, normal operation FAULTZ = Low (an external 100 kΩ pull-up resistor required), fault condition |
4 | RINP | I | Positive audio input for right channel. Connect to GND for MONO mode. |
5 | RINN | I | Negative audio input for right channel. Connect to GND for MONO mode. |
6 | PLIMIT | I | Power limit level adjust. Connect a resistor divider from GVDD to GND to set power limit. Connect directly to GVDD for no power limit. Refer to: PLIMIT Operation |
7 | GVDD | PO | Internally generated gate voltage supply. Not to be used as a supply or connected to any component other than a 1 µF X7R ceramic decoupling capacitor and the PLIMIT and GAIN/SLV resistor dividers. Refer to: GVDD Supply |
8 | GAIN/SLV | I | Selects Gain and selects between Master and Slave mode depending on pin voltage divider. Refer to: Gain Setting and Master and Slave |
9 | GND | G | Ground |
10 | LINP | I | Positive audio input for left channel. Connect to GND for PBTL mode. |
11 | LINN | I | Negative audio input for left channel. Connect to GND for PBTL mode. |
12 | MUTE | I | Mute signal for fast disable/enable of outputs (HIGH = outputs Hi-Z, LOW = outputs enabled). TTL logic levels with compliance to AVCC. |
13 | AM2 | I | AM Avoidance Frequency Selection |
14 | AM1 | I | AM Avoidance Frequency Selection |
15 | AM0 | I | AM Avoidance Frequency Selection |
16 | SYNC | DIO | Clock input/output for synchronizing multiple Class-D devices. Direction determined by GAIN/SLV terminal. Refer to: Gain Setting and Master and Slave |
17 | AVCC | P | Analog Supply |
18 | PVCC | P | Power supply |
19 | PVCC | P | Power supply |
20 | BSNL | BST | Boot strap for negative left channel output, connect to 220 nF X5R, or better ceramic cap to OUTPL |
21 | OUTNL | PO | Negative left channel output |
22 | GND | G | Ground |
23 | OUTPL | PO | Positive left channel output |
24 | BSPL | BST | Boot strap for positive left channel output, connect to 220 nF X5R, or better ceramic cap to OUTNL Refer to: BSPx and BSNx Capacitors |
25 | GND | G | Ground |
26 | BSNR | BST | Boot strap for negative right channel output, connect to 220 nF X5R, or better ceramic cap to OUTNR. Refer to: BSPx and BSNx Capacitors |
27 | OUTNR | PO | Negative right channel output |
28 | GND | G | Ground |
29 | OUTPR | PO | Positive right channel output |
30 | BSPR | BST | Boot strap for positive right channel output, connect to 220 nF X5R or better ceramic cap to OUTPR. Refer to: BSPx and BSNx Capacitors |
31 | PVCC | P | Power supply |
32 | PVCC | P | Power supply |
PowerPAD™ | G | Connect to GND for best system performance. If not connected to GND, leave floating. |