JAJSI28A October   2019  – August 2020 TPA3139D2

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics,
      1. 6.7.1 Bridge -Tied Load (BTL)
      2. 6.7.2 Paralleled Bridge -Tied Load (PBTL)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Gain
      2. 7.3.2  SD/ FAULT and MUTE Operation
      3. 7.3.3  PLIMIT
      4. 7.3.4  Spread Spectrum and De-Phase Control
      5. 7.3.5  GVDD Supply
      6. 7.3.6  DC Detect
      7. 7.3.7  PBTL Select
      8. 7.3.8  Short-Circuit Protection and Automatic Recovery Feature
      9. 7.3.9  Over-Temperature Protection (OTP)
      10. 7.3.10 Over-Voltage Protection (OVP)
      11. 7.3.11 Under-Voltage Protection (UVP)
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE_SEL = LOW: BD Modulation
      2. 7.4.2 MODE_SEL = HIGH: Low-Idle-Current 1SPW Modulation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 PCB Material Recommendation
        2. 8.2.1.2 PVCC Capacitor Recommendation
        3. 8.2.1.3 Decoupling Capacitor Recommendations
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Ferrite Bead Filter Considerations
        2. 8.2.2.2 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme
        3. 8.2.2.3 When to Use an Output Filter for EMI Suppression
        4. 8.2.2.4 Input Resistance
        5. 8.2.2.5 Input Capacitor, Ci
        6. 8.2.2.6 BSN and BSP Capacitors
        7. 8.2.2.7 Differential Inputs
        8. 8.2.2.8 Using Low-ESR Capacitors
      3. 8.2.3 Application Performance Curves
        1. 8.2.3.1 EN55013 Radiated Emissions Results
        2. 8.2.3.2 EN55022 Conducted Emissions Results
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Decoupling, CS
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINMAXUNIT
VCCSupply voltagePVCC, AVCC3.514.4V
VIHHigh-level input voltageSD/ FAULT(1), MUTE, GAIN_SEL, MODE_SEL2AVCCV
VILLow-level input voltageSD/ FAULT, MUTE, GAIN_SEL, MODE_SEL(2)0.8V
VOLLow-level output voltageSD/ FAULT, RPULL-UP =100 kΩ, PVCC = 14.4 V0.8V
IIHHigh-level input currentSD/ FAULT, MUTE, GAIN_SEL, MODE_SEL, VI = 2 V, AVCC = 12 V50µA
IILLow-level input currentSD/ FAULT, MUTE, GAIN_SEL, MODE_SEL, VI = 0.8 V, AVCC = 12 V5µA
TAOperating free-air temperature(3)(4)–1085°C
TJOperating junction temperature(3)-10150°C
(1) Set SD/ FAULT to high level, make sure the pull-up resistor is larger than 4.7 kΩ and smaller than 500 kΩ
(2) Set GAIN_SEL and MODE_SEL to low level, make sure pull down resistor<10 kΩ
(3) The TPA3138D2 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection shutdown. See TI Technical Briefs SLMA002 for more information about using the TSSOP thermal pad.
(4) TPA3139D2 supports -40°C ~85°C ambient temperature range with ≤12 V operating PVDD range.