SLOS907C April   2015  – December 2017 TPA3144D2

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Gain Setting via GAIN Pin
      2. 9.3.2  SD Operation
      3. 9.3.3  Gain Limit Control, LIMTHRES and LIMRATE
      4. 9.3.4  SPEAKERGUARD Automatic Gain Limit, AGL
      5. 9.3.5  Thermal Foldback, TFB
      6. 9.3.6  PLIMIT
      7. 9.3.7  LIMTHRES
      8. 9.3.8  Spread Spectrum and De-Phase Control
      9. 9.3.9  GVDD Supply
      10. 9.3.10 DC Detect
      11. 9.3.11 PBTL Select
      12. 9.3.12 Short-Circuit Protection and Automatic Recovery Feature
      13. 9.3.13 Thermal Protection
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 PCB Material Recommendation
        2. 10.2.1.2 PVCC Capacitor Recommendation
        3. 10.2.1.3 Decoupling Capacitor Recommendations
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Ferrite Bead Filter Considerations
        2. 10.2.2.2 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme
        3. 10.2.2.3 When to Use an Output Filter for EMI Suppression
        4. 10.2.2.4 Input Resistance
        5. 10.2.2.5 Input Capacitor, Ci
        6. 10.2.2.6 BSN and BSP Capacitors
        7. 10.2.2.7 Differential Inputs
        8. 10.2.2.8 Using Low-ESR Capacitors
      3. 10.2.3 Application Performance Curves
        1. 10.2.3.1 EN55013 Radiated Emissions Results
        2. 10.2.3.2 EN55022 Conducted Emissions Results
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Decoupling, CS
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.11 PBTL Select

The TPA3144D2 offers the feature of parallel BTL operation with two outputs of each channel connected directly. If the LINP and LINN input pins (pin 3 and 4) are tied low, the positive and negative outputs of each channel (left and right) are synchronized and in phase. To operate in this PBTL (mono) mode, tie LINP and LINN inputs low to GND and apply the input signal to the RINP and RINN inputs and place the speaker between the LEFT and RIGHT outputs with OUTPL connected to OUTNL and OUTPR connected to OUTNR to parallel the output half bridges for highest power efficiency. For an example of the PBTL connection, see the schematic in the Typical Applications section.