JAJSDH5B December   2008  – July 2017 TPA6132A2

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Condtions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Operating Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Headphone Amplifiers
      2. 7.3.2 Eliminating Turn-on Pop and Power Supply Sequencing
      3. 7.3.3 RF and Power Supply Noise Immunity
      4. 7.3.4 Constant Maximum Output Power and Acoustic Shock Prevention
    4. 7.4 Device Functional Modes
      1. 7.4.1 Gain Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Configuration with Differential Input Signals
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input Coupling Capacitors
          2. 8.2.1.2.2 Charge Pump Flying Capacitor and HPVSS Capacitor
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Configuration with Single-Ended Input Signals
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply and HPVDD Decoupling Capacitors
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 GND Connections
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RTE|16
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

RTE (WQFN) Package
(Top View)
TPA6132A2 po_RTE_slos597.gif

Pin Functions

PIN I/O/P DESCRIPTION
NAME NO.
INL- 1 I Inverting left input for differential signals; left input for single-ended signals
INL+ 2 I Non-inverting left input for differential signals. Connect to ground for single-ended input applications
INR+ 3 I Non-inverting right input for differential signals. Connect to ground for single-ended input applications
INR- 4 I Inverting right input for differential signals; right input for single-ended signals
OUTR 5 O Right headphone amplifier output. Connect to right terminal of headphone jack
G0 6 I Gain select
GAIN0 I
G1 7 I Gain select
GAIN1 I
HPVSS 8 P Charge pump output and negative power supply for output amplifiers; connect 1μF capacitor to GND
CPN 9 P Charge pump negative flying cap. Connect to negative side of 1μF capacitor between CPP and CPN
PGND 10 P Ground
CPP 11 P Charge pump positive flying cap. Connect to positive side of 1μF capacitor between CPP and CPN
HPVDD 12 P Positive power supply for headphone amplifiers. Connect to a 2.2μF capacitor. Do not connect to VDD
EN 13 I Amplifier enable. Connect to logic low to shutdown; connect to logic high to activate
VDD 14 P Positive power supply for TPA6132A2
SGND 15 P Amplifier reference voltage. Connect to ground terminal of headphone jack
OUTL 16 O Left headphone amplifier output. Connect to left terminal of headphone jack
Thermal Pad – Solder the exposed metal pad on the TPA6132A2RTE QFN package to the landing pad on the PCB. Connect the landing pad to ground or leave it electrically unconnected (floating).