SLLS683F JULY   2006  – October 2015 TPD3E001

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRS|6
  • DRL|5
  • DRY|6
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DRY Package
6-Pin USON
Top View
TPD3E001 po_01_slls683.gif
DRL Package
5-Pin SOT
Top View
TPD3E001 po_02_slls683.gif
DRS Package
6-Pin WSON
Top View
TPD3E001 po_03_slls683.gif

Pin Functions

PIN TYPE DESCRIPTION
NAME DRY NO. DRL NO. DRS NO.
IOx 1, 2, 4 1, 2, 4 1, 2, 4 I/O ESD-protected channel
GND 3 3 3 GND Ground
VCC 6 5 6 Power Power-supply input. Bypass VCC to GND with a 0.1-μF ceramic capacitor.
N.C. 5 – 5 – No connection. Not internally connected.
EP – – Exposed Thermal Pad GND Exposed thermal pad. Connect to GND or leave floating.