JAJSJ53B may   2020  – april 2023 TPD3S713-Q1 , TPD3S713A-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 FAULT Response
      2. 8.3.2 Cable Compensation
        1. 8.3.2.1 Design Procedure
      3. 8.3.3 DP and DM Protection
      4. 8.3.4 VBUS OVP Protection
      5. 8.3.5 Output and DP or DM Discharge
      6. 8.3.6 Overcurrent Protection
      7. 8.3.7 Undervoltage Lockout
      8. 8.3.8 Thermal Sensing
      9. 8.3.9 Current-Limit Setting
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Truth Table (TT)
      2. 8.4.2 Client Mode
      3. 8.4.3 High-Bandwidth Data-Line Switch
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Capacitance
        2. 9.2.2.2 Output Capacitance
        3. 9.2.2.3 BIAS Capacitance
        4. 9.2.2.4 Output and BIAS TVS
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • RVC|20
サーマルパッド・メカニカル・データ
発注情報

Overview

The TPD3S713x-Q1 is a single-chip solution for short-to-battery, short-circuit, and ESD protection for high speed data and power lines in automotive USB hub, head unit, telematics, and media interface applications. The integrated data switches provide best-in-class bandwidth for minimal signal degradation during USB short-to-battery events. The high bandwidth allows for a clean USB2.0 high-speed eye diagram which helps pass stringent USB certification tests in the automotive USB environment.

The short-to-battery protection isolates the internal system circuits from any overvoltage conditions at the VBUS, DP_IN, and DM_IN pins. On these pins, the TPD3S713x-Q1 can handle overvoltages up to 18 V for hot plug and DC events. This feature protects the upstream voltage regulator, automotive processor, and hub when these pins are exposed to fault conditions.

The VBUS pin also provides an accurate current limited load switch from 55 mA to 600 mA. The leading overcurrent protection automatically limits current to prevent drooping of the upstream rail during short-to-ground events. Also TPD3S713x-Q1 can save power budget for the whole system.

The TPD3S713x-Q1 device integrates a cable compensation (CS) feature to compensate for long-cable voltage drop. This feature keeps the remote USB port output voltage constant to enhance the user experience under high-current charging conditions.

The TPD3S713x-Q1 device provides a current-monitor function (IMON) by connecting a resistor from the IMON pin to GND to provide a positive voltage linearly with load current. This connection can be used for system power or dynamic power management.

Additionally, the device provides ESD protection up to ±8 kV (contact discharge) and ±15 kV (air discharge) per IEC 61000-4-2 on DP_IN and DM_IN.