TPD4E02B04-Q1 USB Type-CおよびHDMI 2.0用の4チャネルESD保護ダイオード
1 特長
- AEC-Q101認定済み
- IEC 61000-4-2 レベル4 ESD保護
- 接触放電±12kV
- エアギャップ放電±15kV
- ISO 10605 (330pF、330Ω) ESD保護
- 接触放電±10kV
- エアギャップ放電±10kV
- IEC 61000-4-4 EFT保護
- 80A (5/50ns)
- IEC 61000-4-5 サージ保護
- 2A (8/20µs)
- IO容量
- 0.25pF (標準値)
- DCブレークダウン電圧: 5.5V (最小値)
- 非常に低いリーク電流: 10nA (最大値)
- 低いESDクランピング電圧: 5A TLPにおいて8.8V
- 最大10Gbpsの高速インターフェイスをサポート
- 工業用温度範囲: －40℃～＋125℃
- 使いやすいフロースルー配線パッケージ
2 アプリケーション
- 最終製品
- ヘッド・ユニット
- リアシート用エンターテイメント
- テレマティクス
- USBハブ
- クラスタ
- 車体制御モジュール
- メディア・インターフェイス
- インターフェイス
- USB Type-C
- USB 3.1 Gen 2
- HDMI 2.0/1.4
- USB 3.0
- DisplayPort 1.3
- 10/100/1000Mbpsイーサネット
3 概要
TPD4E02B04-Q1は、USB Type-CおよびHDMI 2.0回路保護に対応した車載用双方向TVS ESD保護ダイオード・アレイです。TPD4E02B04-Q1は、ISO 10605 (330pF、330Ω) ESD規格に準拠し、最大10kVのESD衝撃を放散できます。またTPD4E02B04は、IEC 61000-4-2国際規格(レベル 4)で規定されている最大レベルのESD耐性を備えています。
このデバイスはチャネル当たりのIO容量が0.25pFであることから、USB 3.1 Gen2など、10Gbpsまでの高速インターフェイスの保護に理想的です。動的抵抗とクランピング電圧が低いため、過渡事象に対してシステム・レベルの保護が保証されます。
TPD4E02B04-Q1は、業界標準のUSON-10 (DQA)パッケージで供給されます。このパッケージはフロースルー配線と0.5mmピン・ピッチを採用しているため、実装が容易で、設計時間を短縮できます。
このデバイスには、車載用認定なしのバージョンとしてTPD4E02B04も用意されています。
製品情報(1)
| 型番 | パッケージ | 本体サイズ(公称) |
|---|---|---|
| TPD4E02B04-Q1 | USON (10) | 2.50mm×1.00mm |
- 提供されているすべてのパッケージについては、データシートの末尾にある注文情報を参照してください。
代表的なアプリケーションの回路図
5 Pin Configuration and Functions
Pin Functions
| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| GND | 3 | Ground | Ground. Connect to ground |
| GND | 8 | ||
| IO1 | 1 | I/O | ESD protected channel |
| IO2 | 2 | ||
| IO3 | 4 | ||
| IO4 | 5 | ||
| NC | 6 | NC | Not connected; Used for optional straight-through routing. Can be left floating or grounded |
| NC | 7 | ||
| NC | 9 | ||
| NC | 10 | ||
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Electrical fast transient | IEC 61000-4-5 (5/50 ns) at 25°C | 80 | A | |
| Peak pulse | IEC 61000-4-5 power (tp - 8/20 µs) at 25°C | 17 | W | |
| IEC 61000-4-5 Ccurrent (tp - 8/20 µs) at 25°C | 2 | A | ||
| TA | Operating free-air temperature | –40 | 125 | °C |
| Tstg | Storage temperature | –65 | 155 | °C |
6.2 ESD Ratings—AEC Specification
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | ±2500 | V |
| Charged-device model (CDM), per AEC Q100-011 | ±1000 | |||
6.3 ESD Ratings—IEC Specification
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | IEC 61000-4-2 contact discharge | ±12000 | V |
| IEC 61000-4-2 air-gap discharge | ±15000 | |||
6.4 ESD Ratings—ISO Specification
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | ISO 10605 330 pF, 330 Ω, IO | Contact discharge | ±10000 | V |
| Air-gap discharge | ±10000 | ||||
6.5 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VIO | Input pin voltage | –3.6 | 3.6 | V |
| TA | Operating free-air temperature | –40 | 125 | °C |
6.6 Thermal Information
| THERMAL METRIC(1) | TPD4E02B04-Q1 | UNIT | |
|---|---|---|---|
| DQA (USON) | |||
| 10 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 348.7 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 214.1 | °C/W |
| RθJB | Junction-to-board thermal resistance | 270.7 | °C/W |
| ψJT | Junction-to-top characterization parameter | 81.7 | °C/W |
| ψJB | Junction-to-board characterization parameter | 270.7 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
6.7 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VRWM | Reverse stand-off voltage | IIO < 10 nA | –3.6 | 3.6 | V | |
| VBRF | Breakdown voltage, any IO pin to GND(1) | IIO = 1 mA, TA = 25°C | 5.5 | 6.4 | 7.5 | V |
| VBRR | Breakdown voltage, GND to any IO pin(1) | IIO = 1 mA, TA = 25°C | –5.5 | –6.4 | –7.5 | V |
| VHOLD | Holding voltage(2) | IIO = 1 mA | 5.8 | V | ||
| VCLAMP | Clamping voltage | IPP = 1 A, TLP, from IO to GND | 6.6 | V | ||
| IPP = 5 A, TLP, from IO to GND | 8.8 | |||||
| IPP = 1 A, TLP, from GND to IO | 6.6 | |||||
| IPP = 5 A, TLP, from GND to IO | 8.8 | |||||
| ILEAK | Leakage current, any IO to GND | VIO = ±2.5 V | 10 | nA | ||
| RDYN | Dynamic resistance | IO to GND | 0.47 | Ω | ||
| GND to IO | 0.47 | |||||
| CL | Line capacitance | VIO = 0 V, f = 1 MHz, IO to GND, TA = 25°C | 0.25 | 0.33 | pF | |
| ΔCL | Variation of line capacitance | Delta of capacitance between any two IO pins, VIO = 0 V, f = 1 MHz, TA = 25°C, GND = 0 V | 0.01 | 0.07 | pF | |
| CCROSS | Channel to channel capacitance | Capacitance from one IO to another, VIO = 0 V, f = 1 MHz, GND = 0 V | 0.13 | 0.16 | pF | |
6.8 Typical Characteristics
(With TPD4E02B04-Q1)
7 Detailed Description
7.1 Overview
The TPD4E02B04-Q1 is an automotive-qualified bidirectional ESD Protection Diode with ultra-low capacitance. This device can dissipate ESD strikes above the maximum level specified by the IEC 61000-4-2 (Level 4) International Standard. The ultra-low capacitance makes this device ideal for protecting any super high-speed signal pins.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 AEC-Q101 Qualified
This device is qualified to AEC-Q101 standards and is qualified to operate from –40°C to +125°C.
7.3.2 ISO 10605 ESD Protection
The I/O pins can withstand ESD events of at least ±10-kV contact and ±10-kV air gap according to the ISO 10605 (330 pF, 330 Ω) standard. The device diverts the current to ground.
7.3.3 IEC 61000-4-2 ESD Protection
The I/O pins can withstand ESD events up to ±12-kV contact and ±15-kV air gap. An ESD-surge clamp diverts the current to ground.
7.3.4 IEC 61000-4-4 EFT Protection
The I/O pins can withstand an electrical fast transient burst of up to 80 A (5/50 ns waveform, 4 kV with 50-Ω impedance). An ESD-surge clamp diverts the current to ground.
7.3.5 IEC 61000-4-5 Surge Protection
The I/O pins can withstand surge events up to 2 A and 17 W (8/20 µs waveform). An ESD-surge clamp diverts this current to ground.
7.3.6 IO Capacitance
The capacitance between each I/O pin to ground is 0.25 pF (typical). This device supports data rates up to 10 Gbps.
7.3.7 DC Breakdown Voltage
The DC breakdown voltage of each I/O pin is a minimum of ±5.5 V. This ensures that sensitive equipment is protected from surges above the reverse standoff voltage of ±3.6 V.
7.3.8 Ultra Low Leakage Current
The I/O pins feature an ultra-low leakage current of 10 nA (maximum) with a bias of ±2.5 V.
7.3.9 Low ESD Clamping Voltage
The I/O pins feature an ESD clamp that is capable of clamping the voltage to 8.8 V (IPP = 5 A).
7.3.10 Supports High Speed Interfaces
This device is capable of supporting high speed interfaces up to 10 Gbps, because of the extremely low IO capacitance.
7.3.11 Industrial Temperature Range
This device features an industrial operating range of –40°C to +125°C.
7.3.12 Easy Flow-Through Routing Package
The layout of this device makes it simple and easy to add protection to an existing layout. The packages offers flow-through routing, requiring minimal modification to an existing layout.
7.4 Device Functional Modes
The TPD4E02B04-Q1 is a passive integrated circuit that triggers when voltages are above VBRF or below VBRR. During ESD events, voltages as high as ±15 kV (air) can be directed to ground via the internal diode network. When the voltages on the protected line fall below the trigger levels of the TPD4E02B04-Q1 (usually within 10s of nano-seconds) the device reverts to passive.
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPD4E02B04-Q1 is a diode type TVS which is used to provide a path to ground for dissipating ESD events on high-speed signal lines between a human interface connector and a system. As the current from ESD passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a safe level for the protected IC.
8.2 Typical Application
Figure 20. USB 3.1 Gen 2 Type-C ESD Schematic
Figure 21. USB 3.1 Gen 2 SuperSpeed Layout
8.2.1 Design Requirements
For this design example two TPD4E02B04-Q1 devices and two TPD4E05U06 devices are being used in a USB 3.1 Gen 2 Type-C application. This provides a complete ESD protection scheme.
Given the USB 3.1 Gen 2 Type-C application, the parameters listed in Table 1 are known.
Table 1. Design Parameters
| DESIGN PARAMETER | VALUE |
|---|---|
| Signal Range on SuperSpeed+ Lines | 0 V to 3.6 V |
| Operating Frequency on SuperSpeed+ Lines | 5 GHz |
| Signal Range on CC, SBU, and DP/DM Lines | 0 V to 5 V |
| Operating Frequency on CC, SBU, and DP/DM Lines | up to 480 MHz |
8.2.2 Detailed Design Procedure
8.2.2.1 Signal Range
The TPD4E02B04-Q1 supports signal ranges between –3.6 V and 3.6 V, which supports the SuperSpeed+ pairs on the USB Type-C application. The TPD4E05U06 supports signal ranges between 0 V and 5.5 V, which supports the CC, SBU, and DP/DM lines.
8.2.2.2 Operating Frequency
The TPD4E02B04-Q1 has a 0.25 pF (typical) capacitance, which supports the USB3.1 Gen 2 data rates of 10 Gbps. The TPD4E05U06 has a 0.5 pF (typical) capacitance, which easily supports the CC, SBU, and DP/DM data rates.
8.2.3 Application Curves
