JAJSRJ3D
December 2012 – October 2023
TPD4E1B06
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Ultra Low Leakage Current 0.5 nA (Maximum)
7.3.2
Transient Protection for 4 I/O Lines
7.3.3
I/O Capacitance 0.7 pF (Typical)
7.3.4
Bi-Directional (ESD) Protection Diode Array
7.3.5
Low ESD Clamping Voltage
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Signal Range on IO1, IO2, IO3, and IO4 Pins
8.2.2.2
Operating Frequency
8.2.3
Application Curves
8.3
Layout
8.3.1
Layout Guidelines
8.3.2
Layout Examples
9
Device and Documentation Support
9.1
ドキュメントの更新通知を受け取る方法
9.2
サポート・リソース
9.3
Trademarks
9.4
静電気放電に関する注意事項
9.5
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DCK|6
MPDS114E
DRL|6
MPDS159H
サーマルパッド・メカニカル・データ
発注情報
jajsrj3d_oa
jajsrj3d_pm
8.2.3
Application Curves
Figure 8-2
3.4 Gbps HDMI 1.4 Eye Diagram in DCK Package