JAJSRJ3E
December 2012 – October 2024
TPD4E1B06
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Ultra Low Leakage Current 0.5 nA (Maximum)
6.3.2
Transient Protection for 4 I/O Lines
6.3.3
I/O Capacitance 0.7 pF (Typical)
6.3.4
Bi-Directional (ESD) Protection Diode Array
6.3.5
Low ESD Clamping Voltage
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Signal Range on IO1, IO2, IO3, and IO4 Pins
7.2.2.2
Operating Frequency
7.2.3
Application Curves
7.3
Layout
7.3.1
Layout Guidelines
7.3.2
Layout Examples
8
Device and Documentation Support
8.1
ドキュメントの更新通知を受け取る方法
8.2
サポート・リソース
8.3
Trademarks
8.4
静電気放電に関する注意事項
8.5
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DCK|6
MPDS114E
DRL|6
MPDS159H
サーマルパッド・メカニカル・データ
発注情報
jajsrj3e_oa
jajsrj3e_pm
5.3
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V
IO
The voltage between any two device pins should not exceed 5.5 V
–5.5
5.5
V
T
A
Operating free-air temperature
–40
125
°C