SLVSCK3C May   2014  – February 2017 TPD4E6B06

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IEC 61000-4-2 Level 2 ESD Protection
      2. 7.3.2 IEC 61000-4-5 Surge Protection
      3. 7.3.3 IO Capacitance
      4. 7.3.4 RDYN
      5. 7.3.5 DC Breakdown Voltage
      6. 7.3.6 Ultra-Low Leakage Current
      7. 7.3.7 Clamping Voltage
      8. 7.3.8 Industrial Temperature Range
      9. 7.3.9 Space Saving DPW Package
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range
        2. 8.2.2.2 Operating Frequency
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPD4E6B06 is a diode array type TVS. These low capacitance types of TVSs are typically used to provide a path to ground for dissipating ESD events on hi speed signal lines between a human interface connector and a system. During high voltage ESD strikes, the device clamps to a safe voltage level to protect the system.

The typical application of the TPD4E6B06 is to be placed in between the connector and the system. The low capacitance of the TPD4E6B06 gives flexibility in the end application, as it can be used on many different high speed interfaces.

8.2 Typical Application

TPD4E6B06 typ_app_slvsck3.gif Figure 10. Protecting Data Lines

8.2.1 Design Requirements

Table 1 shows the design parameters.

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Signal range on data lines –5.5 V to 5.5 V
Operating frequency Up to 700 MHz

8.2.2 Detailed Design Procedure

The designer needs to know the following:

  • Signal range on all the protected lines
  • Operating frequency

8.2.2.1 Signal Range

The TPD4E6B06 has 4 protection channels for signal lines. Any I/O supports a signal range of –5.5 V to
5.5 V.

8.2.2.2 Operating Frequency

The TPD4E6B06 has 4.8 pF of capacitance (Typical), supporting up to 700 MHz frequencies.

8.2.3 Application Curve

TPD4E6B06 G009_SLVSBE2.png Figure 11. Insertion Loss (Any IO to GND)