JAJSNA6O
December 2012 – August 2024
TPD1E05U06
,
TPD4E05U06
,
TPD6E05U06
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
Absolute Maximum Ratings
5.1
ESD Ratings—JEDEC Specification
5.2
ESD Ratings—IEC Specification
Recommended Operating Conditions
5.3
Thermal Information
5.4
Electrical Characteristics
5.5
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
±15-kV IEC61000-4-2 Level 4 ESD Protection
6.3.2
IEC61000-4-4 EFT Protection
6.3.3
IEC61000-4-5 Surge Protection
6.3.4
I/O Capacitance
6.3.5
DC Breakdown Voltage
6.3.6
Ultra-Low Leakage Current
6.3.7
Low ESD Clamping Voltage
6.3.8
Industrial Temperature Range
6.3.9
Easy Flow-Through Routing
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Applications
7.2.1
HDMI 2.0 Application
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Signal Range on Pin 1, 2, 4, or 5
7.2.1.3
Application Curves
7.2.2
HDMI 2.0 Application
7.2.2.1
Design Requirements
7.2.2.2
Detailed Design Procedure
7.2.2.2.1
Signal Range
7.2.2.2.2
Operating Frequency
7.2.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
7.4.2.1
TPD4E05U06 Layout Example
7.4.2.2
TPD1E05U06 Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
ドキュメントの更新通知を受け取る方法
8.3
サポート・リソース
8.4
Trademarks
8.5
静電気放電に関する注意事項
8.6
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
10.1
Tape and Reel Information
10.2
Mechanical Data
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RVZ|14
MPDF004A
サーマルパッド・メカニカル・データ
RVZ|14
QFND536
発注情報
jajsna6o_oa
jajsna6o_pm
6.2
Functional Block Diagram
Figure 6-1
TPD1E05U06 Block Diagram
Figure 6-2
TPD4E05U06 Block Diagram
Figure 6-3
TPD6E05U06 Block Diagram