JAJSO48E
October 2004 – May 2022
TPIC1021
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
概要 (続き)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
LIN Bus Pin
8.3.1.1
Transmitter Characteristics
8.3.1.2
Receiver Characteristics
8.3.2
Transmit Input Pin (TXD)
8.3.2.1
TXD Dominant State Timeout
8.3.3
Receive Output Pin (RXD)
8.3.3.1
RXD Wake-up Request
8.3.4
Ground (GND)
8.3.5
Enable Input Pin (EN)
8.3.6
NWake Input Pin (NWake)
8.3.7
Inhibit Output Pin (INH)
8.4
Device Functional Modes
8.4.1
Operating States
8.4.1.1
Normal Mode
8.4.1.2
Low Power Mode
8.4.1.3
Wake-Up Events
8.4.1.4
Standby Mode
8.4.2
Supply Voltage (VSUP)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
サポート・リソース
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
Glossary
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
D|8
サーマルパッド・メカニカル・データ
発注情報
jajso48e_oa
jajso48e_pm
7
Specifications