JAJSHY2C September   2011  – September 2019 TPL0501-100

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics: Analog Specifications
    5. 6.5 Electrical Characteristics: Operating Specifications
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Single-Channel, 256-Position Resolution
    4. 7.4 Device Functional Modes
      1. 7.4.1 Voltage Divider Mode
      2. 7.4.2 Rheostat Mode
    5. 7.5 Programming
      1. 7.5.1 SPI Digital Interface
        1. Table 1. Register Map - Default Value 0x80
      2. 7.5.2 Ideal Resistance Values
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
    1. 9.1 Power Sequence
    2. 9.2 Wiper Position Upon Power Up
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.1 Power Sequence

Protection diodes limit the voltage compliance at terminal H, terminal L, and terminal W, making it important to power up VDD first before applying any voltage to terminal H, terminal L, and terminal W. The diodes are forward-biasing, meaning VDD is not powered first. The ideal power up sequence is VDD, digital inputs, and VH, VL, and VW. The order of powering digital inputs, VH, VL, and VW does not matter as long as they are powered after VDD.