JAJSG91B June 2015 – September 2018 TPL5111
PRODUCTION DATA.
The TPL5111 is a timer with power gating feature. The TPL5111 can be used in power-cycled applications and provides selectable timing from 100 ms to 7200 s.
When configured in timer mode (EN/ONE_SHOT= HIGH), the TPL5111 periodically asserts a DRVn signal to an LDO or DC-DC converter that is used to turn on a microcontroller. If the microcontroller replies with a DONE signal within the programmed time interval (< tDRVn), the TPL5111 de-asserts DRVn. Otherwise, the TPL5111 asserts DRVn for a time equal to tDRVn.
The TPL5111 can also work in a one-shot mode (EN/ONE_SHOT= LOW). In this mode, the DRVn signal is asserted just one time at the power on of the TPL5111. If the µC replies with a DONE signal within the programmed time interval (< tDRVn), the TPL5111 de-asserts DRVn. Otherwise the TPL5111 asserts DRVn for a time equal to tDRVn.