JAJSG91B June   2015  – September 2018 TPL5111

PRODUCTION DATA.  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
   1.     Device Images
      1.      簡略化されたアプリケーション回路図
4. 4 改訂履歴
5. 5 Pin Configuration and Functions
   1.     Pin Functions
6. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Ratings
   4. 6.4 Thermal Information
   5. 6.5 Electrical Characteristics
   6. 6.6 Timing Requirements
   7. 6.7 Typical Characteristics
7. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 DRVn
      2. 7.3.2 DONE
   4. 7.4 Device Functional Modes
      1. 7.4.1 Start-Up
      2. 7.4.2 Timer Mode
      3. 7.4.3 One-Shot Mode
   5. 7.5 Programming
      1. 7.5.1 Configuring the Time Interval With the DELAY/M_DRV Pin
      2. 7.5.2 Manual Power ON Applied to the DELAY/M_DRV Pin
         1. 7.5.2.1 DELAY/M_DRV
         2. 7.5.2.2 Circuitry
      3. 7.5.3 Selection of the External Resistance
      4. 7.5.4 Quantization Error
      5. 7.5.5 Error Due to Real External Resistance
8. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
9. 9 Power Supply Recommendations
10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
12. 12メカニカル、パッケージ、および注文情報