Certain end equipments like automotive power distribution unit power different loads including other ECUs. These ECUs can have large input capacitances. If power to the ECUs is switched on in uncontrolled way, large inrush currents can occur potentially damaging the power FETs. To limit the inrush current during capacitive load switching, the following system design technique can be used with TPS12000-Q1.

For limiting inrush current during turn ON of the FET with capacitive loads, use R₁, R₂, C₁ as shown in Figure 7-4. The R₁ and C₁ components slow down the voltage ramp rate at the gate of the FET. The FET source follows the gate voltage resulting in a controlled voltage ramp across the output capacitors.

Figure 7-4 Inrush Current limiting

Use the Equation 2 to calculate the inrush current during turn-ON of the FET.

Where,

C_LOAD is the load capacitance,

VBATT is the input voltage and T_charge is the charge time,

V_(BST-SRC) is the charge pump voltage (11 V),

Use a damping resistor R₂ (~ 10 Ω) in series with C₁. Equation 3 can be used to compute required C₁ value for a target inrush current. A 100 kΩ resistor for R₁ can be a good starting point for calculations.

Connecting PD pin of TPS12000-Q1 directly to the gate of the external FET ensures fast turn OFF without any impact of R₁ and C₁ components.

C₁ results in an additional loading on C_BST to charge during turn-ON. Use below equation to calculate the required C_BST value:

Where,

Q_g(total) is the total gate charge of the FET.

ΔV_BST (1 V typical) is the ripple voltage across BST to SRC pins.