JAJSND1D
July 2022 – April 2024
TPS1211-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Charge Pump and Gate Driver Output (VS, PU, PD, BST, SRC)
8.3.2
Capacitive Load Driving
8.3.2.1
FET Gate Slew Rate Control
8.3.2.2
Using Precharge FET - (with TPS12111-Q1 Only)
8.3.3
Overcurrent and Short-Circuit Protection
8.3.3.1
Overcurrent Protection with Auto-Retry
8.3.3.2
Overcurrent Protection with Latch-Off
8.3.3.3
Short-Circuit Protection
8.3.4
Analog Current Monitor Output (IMON)
8.3.5
Overvoltage (OV) and Undervoltage Protection (UVLO)
8.3.6
Remote Temperature Sensing and Protection (DIODE)
8.3.7
Output Reverse Polarity Protection
8.3.8
TPS1211x-Q1 as a Simple Gate Driver
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application: Driving Zonal Controller Loads on 12-V Line in Power Distribution Unit
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Typical Application: Reverse Polarity Protection with TPS12110-Q1
9.3.1
Design Requirements
9.3.2
External Component Selection
9.3.3
Application Curves
9.4
Power Supply Recommendations
9.5
Layout
9.5.1
Layout Guidelines
9.5.2
Layout Example
10
Device and Documentation Support
10.1
ドキュメントの更新通知を受け取る方法
10.2
サポート・リソース
10.3
Trademarks
10.4
静電気放電に関する注意事項
10.5
用語集
11
Revision History
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGX|19
MPSS147
サーマルパッド・メカニカル・データ
発注情報
jajsnd1d_oa
jajsnd1d_pm
8.2
Functional Block Diagram
Figure 8-1
TPS12110-Q1 and TPS12112-Q1 Functional Block Diagram
Figure 8-2
TPS12111-Q1 Functional Block Diagram