JAJSOU3 March   2024 TPS1213-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Charge Pump and Gate Driver Output (VS, G1PU, G1PD, BST, SRC)
      2. 7.3.2 Capacitive Load Driving
        1. 7.3.2.1 Using Low Power Bypass FET (G2 drive) for Load Capacitor Charging
        2. 7.3.2.2 Using Main FET's (G1 drive) Gate Slew Rate Control
      3. 7.3.3 Short-Circuit Protection
        1. 7.3.3.1 Short-Circuit Protection With Auto-Retry
        2. 7.3.3.2 Short-Circuit Protection With Latch-Off
      4. 7.3.4 Device Functional Modes
        1. 7.3.4.1 State Diagram
        2. 7.3.4.2 State Transition Timing Diagram
        3. 7.3.4.3 Power Down
        4. 7.3.4.4 Shutdown Mode
        5. 7.3.4.5 Low Power Mode
        6. 7.3.4.6 Active Mode
      5. 7.3.5 Undervoltage Protection (UVLO)
      6. 7.3.6 Reverse Polarity Protection
      7. 7.3.7 Short-Circuit Protection Diagnosis (SCP_TEST)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Application Limitations
        1. 8.1.1.1 Short-Circuit Protection Delay
        2. 8.1.1.2 Short-Circuit Protection and Load wakeup Threshold
    2. 8.2 Typical Application 1: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical Application 2: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup and Output Bulk Capacitor Charging
      1. 8.3.1 Design Requirements
      2. 8.3.2 External Component Selection
      3. 8.3.3 Application Curves
    4. 8.4 TIDA-020065: Automotive Smart Fuse Reference Design driving Power at all times (PAAT) Loads With Automatic Load Wakeup, Output Bulk Capacitor Charging, Bi-directional Current Sensing and Software I2t
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The TPS12130-Q1 is a 45V low IQ smart high side driver with protection and diagnostics. With wide operating voltage range of 3.5V–40V, the device is designed for 12V system designs. The device can withstand and protect the loads from negative supply voltages down to –40V.

TPS12130-Q1 has integrated two gate drives with 1.69A source and 2A sink capacity to drive MOSFETs in the main path and 165µA source and 2A sink capacity for the low power path.

In the low power mode with LPM = Low, the low power path FET is kept ON and the main FETs are turned OFF. The device consumes low IQ of 35µA (typical) in this mode. Auto load wakeup threshold to enter into active state can be adjusted using ISCP/LWU pin. IQ reduces to 1μA (typical) with EN/UVLO low.

The device features WAKE output pin to indicate the mode of operation (active/low power mode).

The device provides adjustable short circuit protection using MOSFET VDS sensing or by using an external RSNS resistor. Auto-retry and latch-off fault behavior can be configured. The device also features diagnosis of the internal short circuit comparator using external control on SCP_TEST input.

The device indicates fault (FLT) on open drain output during short circuit, charge pump under voltage and input under voltage conditions.

The TPS12130-Q1 is available in a 19-pin VSSOP package.