JAJSF49 April   2018 TPS22810-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical DC Characteristics
    8. 6.8 Typical AC Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 On and Off Control
      2. 8.3.2 Quick Output Discharge (QOD)
        1. 8.3.2.1 QOD when System Power is Removed
        2. 8.3.2.2 Internal QOD Considerations
      3. 8.3.3 EN/UVLO
      4. 8.3.4 Adjustable Rise Time (CT)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 ON and OFF Control
      2. 9.1.2 Input Capacitor (Optional)
      3. 9.1.3 Output Capacitor (Optional)
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Shutdown Sequencing During Unexpected Power Loss
        2. 9.2.2.2 VIN to VOUT Voltage Drop
        3. 9.2.2.3 Inrush Current
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.4 Adjustable Rise Time (CT)

A capacitor to GND on the CT pin sets the slew rate. The voltage on the CT pin can be as high as 2.5 V. An approximate formula for the relationship between CT and slew rate is shown in Equation 3. This equation accounts for 10% to 90% measurement on VOUT and does NOT apply for CT < 1 nF.

Use Table 2 to determine rise times for when CT ≥ 1 nF.

Equation 3. SR = 46.62 / CT

where

  • SR is the slew rate (in V/µs)
  • CT is the the capacitance value on the CT pin (in pF)

Rise time can be calculated by dividing the input voltage by the slew rate. Table 2 describes rise time values measured on a typical device. Rise times shown below are only valid for the power-up sequence where VIN is already in steady state condition before the EN/UVLO pin is asserted high.

Table 2. Rise Time Table

CT (pF) RISE TIME (µs) 10% - 90%, CL = 0.1 µF, CIN = 1 µF, RL = 10 Ω
VIN = 18 V VIN = 12 V VIN = 9 V VIN = 5 V VIN = 3.3 V
0 115 91 78 60 98
470 136 94 80 63 98
1000 310 209 158 91 102
2200 688 464 345 198 135
4700 1430 957 704 397 265
10000 3115 2085 1540 864 550
27000 8230 5460 4010 2245 1430