SLVSD04 April   2015 TPS22860

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1. 3.1 Common Application Schematic
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 ON/OFF Control
      2. 7.3.2 Pass Transistor
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inrush Current
        2. 8.2.2.2 ON/OFF Interface
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Thermal Reliability
    3. 10.3 Improving Package Thermal Performance
    4. 10.4 Layout Example
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT(2)
VBIAS BIAS voltage range –0.5 6.5 V
VIN Input voltage range –0.5 VBIAS + 0.5 V
VOUT Output voltage range –0.5 VBIAS + 0.5 V
VON Input voltage range –0.5 6.5 V
IMAX Maximum Continuous Switch Current 200 mA
IPLS Maximum Pulsed Switch Current, pulse <300us, 2% duty cycle 400 mA
TA Operating free-air temperature range(3) –40 85 °C
TJ Maximum junction temperature 125 °C
TSTG Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Inapplications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (JA × PD(max))

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) 1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input voltage range 0 VBIAS V
VBIAS Supply voltage range 1.65 5.5 V
VON Control input voltage range 0 5.5 V
VOUT Output voltage range 0 VBIAS V
VIH, ON High-level input voltage, ON VBIAS = 5 V 2.4 5.5 V
VIL, ON Low-level input voltage, ON VBIAS = 5 V 0 0.8 V
CIN Input Capacitor 1 µF

6.4 Thermal Information

THERMAL METRIC(1)(2) TPS22860 UNIT
DBV DCK
6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 235.2 249.0 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 164.8 107.7
RθJB Junction-to-board thermal resistance 82,.5 95.8
ψJT Junction-to-top characterization parameter 52.9 6.2
ψJB Junction-to-board characterization parameter 82.0 93.7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

6.5 Electrical Characteristics

over operating free-air temperature range(1) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IQ, VBIAS VBIAS quiescent current IOUT = 0, VIN = VON = VBIAS = 3.3 V 10 100 nA
ISD, VBIAS VBIAS shutdown current VON = 0 V 10 100
ISD, VIN VIN shutdown current VON = 0 V, VOUT = 1 V VIN = 3.0 V 2 50
ION ON pin input leakage current VON = 5.5 V 100
RESISTANCE CHARACTERISTICS
RON ON-state resistance IOUT = –100 mA, VBIAS = 3.3 V VIN = 3.3 V TA = 25°C 0.92 1.15 Ω
Full TA 1.31
VIN = 2 V TA = 25°C 1.2 1.5
Full TA 1.7
VIN = 1.8 V TA = 25°C 0.95 1.2
Full TA 1.35
(1) Over the operating ambient temp –40°C ≤ TA ≤ 85°C (full) and VBIAS = 3.3V. Typical values are for TA = 25°C. (unless otherwise noted)
over operating free-air temperature range(1) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tON Turn-on time VOUT = VBIAS, RL = 50 Ω CL = 35 pF TA = 25°C VBIAS = 3.3 V 2 4.5 13 ns
Full TA VBIAS = 3 V to 3.6 V 1 15
tOFF Turn-off time VOUT = VBIAS, RL = 50 Ω CL = 35 pF TA = 25°C VBIAS = 3.3 V 3 9 15 ns
Full TA VBIAS = 3 V to 3.6 V 2 20
tON/OFF ON/OFF delay time See Figure 9
(1) VIN = VON = VBIAS = 5V, TA = 25ºC

6.7 Typical Characteristics

TPS22860 tps22860_f1.gifFigure 1. ron vs VOUT
TPS22860 tps22860_f3.gifFigure 3. ron vs VOUT (VBIAS = 5 V)
TPS22860 tps22860_f5.gifFigure 5. Leakage Current vs Temperature (VBIAS = 5 V)
TPS22860 tps22860_f13.gifFigure 7. Power-Supply Current vs Temperature
(VBIAS = 5 V)
TPS22860 tps22860_f2.gifFigure 2. ron vs VOUT (VBIAS = 3.3 V)
TPS22860 tps22860_f4.gifFigure 4. Leakage Current vs Temperature (VBIAS = 5.5 V)
TPS22860 tps22860_f9.gifFigure 6. Logic-Level Threshold vs VBIAS