SLVSBI7C July   2012  – April 2015 TPS22908

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical DC Characteristics
      2. 7.7.2 Typical Switching Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 ON/OFF Control
      2. 9.3.2 Quick Output Discharge
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Input Capacitor (Optional)
      2. 10.1.2 Output Capacitor (Optional)
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Managing Inrush Current
        2. 10.2.2.2 VIN to VOUT Voltage Drop
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

12 Layout

12.1 Layout Guidelines

For best performance, VIN, VOUT, and GND traces should be as short and wide as possible to help minimize the parasitic electrical effects. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal operation.

12.2 Layout Example

TPS22908 TPS2290x Drawing.jpgFigure 32. Layout Example

12.3 Thermal Considerations

For higher reliability, the maximum IC junction temperature, TJ(max), should be restricted to 125˚C under normal operating conditions. Junction temperature is directly proportional to power dissipation in the device and the two are related by:

Equation 5. TJ = TA + RθJA × PD

where

  • TJ = Junction temperature of the device
  • TA = Ambient temperature
  • PD = Power dissipation inside the device
  • RθJA = Junction to ambient thermal resistance. See Thermal Information for more information. This parameter is highly dependent on board layout.