JAJSCB4B July   2016  – December 2019 TPS22918-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
      2.      オン抵抗と入力電圧の標準値との関係
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical DC Characteristics
    8. 6.8 Typical AC Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 On and Off Control
      2. 8.3.2 Quick Output Discharge (QOD)
        1. 8.3.2.1 QOD when System Power is Removed
        2. 8.3.2.2 Internal QOD Considerations
      3. 8.3.3 Adjustable Rise Time (CT)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Capacitor (CIN)
        2. 9.2.2.2 Output Capacitor (CL) (Optional)
        3. 9.2.2.3 Shutdown Sequencing During Unexpected System Power Loss
        4. 9.2.2.4 VIN to VOUT Voltage Drop
        5. 9.2.2.5 Inrush Current
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Switching Characteristics

See timing test circuit in Figure 21 (unless otherwise noted) for references to external components used for the test condition in the switching characteristics table. Switching characteristics shown below are only valid for the power-up sequence where VIN is already in steady state condition before the ON pin is asserted high. Test Conditions: VON = 5 V, TA = 25°C.
PARAMETER TEST CONDITION MIN TYP MAX UNIT
VIN = 5 V
tON Turnon time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 1950 µs
tOFF Turnoff time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2 µs
tR VOUT rise time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2540 µs
tF VOUT fall time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2 µs
tD Delay time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 690 µs
VIN = 3.3 V
tON Turnon time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 1430 µs
tOFF Turnoff time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2 µs
tR VOUT rise time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 1680 µs
tF VOUT fall time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2 µs
tD Delay time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 590 µs
VIN = 1.8 V
tON Turnon time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 965 µs
tOFF Turnoff time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2 µs
tR VOUT rise time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 960 µs
tF VOUT fall time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2 µs
tD Delay time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 480 µs
VIN = 1 V
tON Turnon time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 725 µs
tOFF Turnoff time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 3 µs
tR VOUT rise time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 560 µs
tF VOUT fall time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 2 µs
tD Delay time RL = 10 Ω, CIN = 1 µF, COUT = 0.1 µF, CT = 1000 pF 430 µs