SLVS840D November   2015  – August 2016 TPS22925

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON and OFF Control
      2. 8.3.2 Quick Output Discharge (QOD) (TPS22925B and TPS22925C Only)
      3. 8.3.3 Reverse Current Blocking
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 VIN to VOUT Voltage Drop
      2. 9.1.2 Input Capacitor (CIN)
      3. 9.1.3 Load Capacitor (CL)
      4. 9.1.4 Standby Power Reduction
      5. 9.1.5 Power Multiplexing
      6. 9.1.6 Thermal Considerations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Managing Inrush Current
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TPS22925 device is a 9-mΩ, single-channel load switch with a controlled slew rate. This design example describes a device containing an N–channel MOSFET that operates at an input voltage range of 3.6 V and supports a maximum continuous current of 3 A. The devices provides reverse current blocking when disabled allowing for power supply protection and power multiplexing capabilities.

9.1.1 VIN to VOUT Voltage Drop

The VIN pin to VOUT pin voltage drop in the device is determined by the RON of the device and the load current. The on-resistance of the device depends upon the VIN condition of the device. See the on-resistance specification in the Electrical Characteristics table. After the on-resistance of the device is determined based upon the input voltage conditions, use Equation 1 to calculate the VIN-to-VOUT voltage drop.

Equation 1. TPS22925 q_deltav_slvs840.gif

where

  • ΔV is the voltage drop from the VIN pin to the VOUT pin
  • IL is the load current
  • RON is the on-resistance of the device for a specific input voltage
  • Choose an appropriate IL so that the maximum current (IMAX) specification of the device is not violated

9.1.2 Input Capacitor (CIN)

To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a discharged load capacitor, place a capacitor between VIN and GND close to the pins. A 1-μF ceramic capacitor, CIN, is usually sufficient. Higher values of CIN can be used to further reduce the voltage drop.

9.1.3 Load Capacitor (CL)

A CIN to CL ratio of 10-to-1 is recommended for minimizing the input voltage dip caused by inrush currents during startup.

9.1.4 Standby Power Reduction

Any end equipment that is being powered from the battery has a need to reduce current consumption in order to maintain the battery charge for a longer time. TPS22925 devices help to accomplish this reduction by turning off the supply to the modules that are in standby state and hence significantly reducing the leakage current overhead of the standby modules. See Figure 31.

TPS22925 standby_power_slvs840.gif Figure 31. Standby Power Reduction

9.1.5 Power Multiplexing

Figure 32 shows a power multiplexing application using two TPS22925xN devices. Use the non-QOD version in order to maintain the output voltage. Configure the GPIO control from the microprocessor unit as break-before-make (BBM).

TPS22925 power_mux_slvs840.gif Figure 32. Power Multiplexing with Two TPS22925xN Devices

9.1.6 Thermal Considerations

Restrict the maximum junction temperature lower than 125°C. Use Equation 2 to calculate the maximum allowable dissipation, PD(max) for a given output load current and ambient temperature.

Equation 2. TPS22925 q_pdmax_slvs840.gif

where

  • PD(max) is the maximum allowable power dissipation
  • TJ(max) is the maximum allowable junction temperature
  • TA is the ambient temperature of the device
  • RθJA is the junction-to-air thermal impedance

NOTE

The RθJA parameter is highly dependent upon board layout. (See the Thermal Information table)

9.2 Typical Application

TPS22925 typ_app_slvs840.gif Figure 33. Typical Application Schematic

9.2.1 Design Requirements

For this design example, use the values listed in Table 2 as the input parameters.

Table 2. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
VIN 3.6 V
CL 1 µF
Maximum Acceptable Inrush Current 40 mA

9.2.2 Detailed Design Procedure

9.2.2.1 Managing Inrush Current

When the switch is enabled, the VIN capacitors must be charged up from 0 V to VIN. This charge arrives in the form of inrush current. Calculate the inrush current using Equation 3.

Equation 3. TPS22925 q_ircl_slvs840.gif

where

  • IINRUSH is the inrush current
  • CL is the load capacitance
  • dv/dt is the output slew rate

The TPS22925Bx and TPS22925Cx have different controlled rise time. TPS22925Bx has shorter rise time than TPS22925Cx. In the application where fast rise time is required and higher inrush current can be tolerated, consider using the TPS22925Bx. For an application that requires a longer rise time and lower inrush current, consider using the TPS22925Cx. Calculate the maximum acceptable slew rate using the design requirements and Equation 4.

Equation 4. TPS22925 q_ircl2_slvs840.gif

The TPS22925Bx has a typical rise time of 97 μs at 3.6 V. This results in a slew rate of 29.7 V/ms which meets the above design requirements. The TPS22925Cx has a typical rise time of 810 μs at 3.6 V. This results in a slew rate of 3.6 V/ms which also meets the above design requirements. Base on inrush current requirement, either devices can be used.

9.2.3 Application Curve

TPS22925 application_curve.png
CL = 1 µF
Figure 34. Inrush Current (TPS22925C)